From mboxrd@z Thu Jan 1 00:00:00 1970 From: Brian Brooks Subject: [PATCH] net: mvpp2: avoid bouncing buffers Date: Sun, 19 Aug 2018 21:47:30 -0500 Message-ID: <20180820024730.9147-1-brian.brooks@linaro.org> Cc: antoine.tenart@bootlin.com, maxime.chevallier@bootlin.com, ymarkman@marvell.com, stefanc@marvell.com, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bjorn.topel@intel.com, brian.brooks@arm.com, Brian Brooks To: davem@davemloft.net Return-path: Received: from mail-yw1-f66.google.com ([209.85.161.66]:43248 "EHLO mail-yw1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725926AbeHTGB3 (ORCPT ); Mon, 20 Aug 2018 02:01:29 -0400 Received: by mail-yw1-f66.google.com with SMTP id l189-v6so6332441ywb.10 for ; Sun, 19 Aug 2018 19:47:44 -0700 (PDT) Sender: netdev-owner@vger.kernel.org List-ID: Some memory regions used by this device need to share the same upper 8 bits of the 40-bit bus address. Currently, a coherent DMA mask of 32 bits is used so that dma_alloc_coherent() regions have the same upper 8 bits. Packet buffers are not allocated via DMA APIs, and the device does not require these memory regions to have the same upper 8 bits. However, packet buffers are being bounced during streaming mappings because streaming and coherent DMA are using the same DMA mask, i.e. dev->dma_mask points to dev->coherent_dma_mask. Avoid bouncing packet buffers by ensuring streaming DMA uses a mask of 40 bits and coherent DMA uses a mask of 32 bits. iperf3 shows throughput increases from 4.04 Gbps to 9.14 Gbps. Signed-off-by: Brian Brooks --- drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 3 +++ drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 6 ++++++ 2 files changed, 9 insertions(+) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h index def00dc3eb4e..3eb0c3ede8d2 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h @@ -676,6 +676,9 @@ struct mvpp2 { struct clk *mg_core_clk; struct clk *axi_clk; + /* DMA mask for streaming mappings */ + u64 dma_mask; + /* List of pointers to port structures */ int port_count; struct mvpp2_port *port_list[MVPP2_MAX_PORTS]; diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index 0319ed9ef8b8..3a190c489589 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -5126,6 +5126,12 @@ static int mvpp2_probe(struct platform_device *pdev) } if (priv->hw_version == MVPP22) { + /* Platform code may have set dev->dma_mask to point + * to dev->coherent_dma_mask, but we want to ensure + * they take different values due to comment below. + */ + pdev->dev.dma_mask = &priv->dma_mask; + err = dma_set_mask(&pdev->dev, MVPP2_DESC_DMA_MASK); if (err) goto err_axi_clk; -- 2.17.1