From: David Miller <davem@redhat.com>
To: horms+renesas@verge.net.au
Cc: sergei.shtylyov@cogentembedded.com, magnus.damm@gmail.com,
netdev@vger.kernel.org, linux-renesas-soc@vger.kernel.org
Subject: Re: [PATCH v3 net-next] ravb: do not write 1 to reserved bits
Date: Tue, 18 Sep 2018 20:10:26 -0700 (PDT) [thread overview]
Message-ID: <20180918.201026.764474223291614125.davem@redhat.com> (raw)
In-Reply-To: <20180918102226.8017-1-horms+renesas@verge.net.au>
From: Simon Horman <horms+renesas@verge.net.au>
Date: Tue, 18 Sep 2018 12:22:26 +0200
> From: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
>
> EtherAVB hardware requires 0 to be written to status register bits in
> order to clear them, however, care must be taken not to:
>
> 1. Clear other bits, by writing zero to them
> 2. Write one to reserved bits
>
> This patch corrects the ravb driver with respect to the second point above.
> This is done by defining reserved bit masks for the affected registers and,
> after auditing the code, ensure all sites that may write a one to a
> reserved bit use are suitably masked.
>
> Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
I've decided to apply this to 'net', let me know if this is a problem.
next prev parent reply other threads:[~2018-09-19 8:46 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-18 10:22 [PATCH v3 net-next] ravb: do not write 1 to reserved bits Simon Horman
2018-09-18 16:54 ` Sergei Shtylyov
2018-10-09 9:28 ` Geert Uytterhoeven
2018-10-09 11:53 ` Simon Horman
2018-09-18 16:56 ` Sergei Shtylyov
2018-09-19 3:10 ` David Miller [this message]
2018-09-19 7:39 ` Simon Horman
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