* [PATCH net-next 1/2] r8169: simplify RTL8169 PHY initialization
@ 2018-09-19 20:00 Heiner Kallweit
2018-09-19 20:02 ` [PATCH net-next 2/2] r8169: remove duplicated RTL8169s PHY initialization steps Heiner Kallweit
2018-09-20 6:06 ` [PATCH net-next 1/2] r8169: simplify RTL8169 PHY initialization David Miller
0 siblings, 2 replies; 4+ messages in thread
From: Heiner Kallweit @ 2018-09-19 20:00 UTC (permalink / raw)
To: David Miller, Realtek linux nic maintainers; +Cc: netdev@vger.kernel.org
PCI_LATENCY_TIMER is ignored on PCIe, therefore we have to do this
for the PCI chips (version <= 06) only. Also we can move setting
PCI_CACHE_LINE_SIZE.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
drivers/net/ethernet/realtek/r8169.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 7f4647c58..a27bf5807 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -4046,16 +4046,13 @@ static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
rtl_hw_phy_config(dev);
if (tp->mac_version <= RTL_GIGA_MAC_VER_06) {
+ pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);
+ pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08);
netif_dbg(tp, drv, dev,
"Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
RTL_W8(tp, 0x82, 0x01);
}
- pci_write_config_byte(tp->pci_dev, PCI_LATENCY_TIMER, 0x40);
-
- if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
- pci_write_config_byte(tp->pci_dev, PCI_CACHE_LINE_SIZE, 0x08);
-
if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
netif_dbg(tp, drv, dev,
"Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
--
2.19.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH net-next 2/2] r8169: remove duplicated RTL8169s PHY initialization steps
2018-09-19 20:00 [PATCH net-next 1/2] r8169: simplify RTL8169 PHY initialization Heiner Kallweit
@ 2018-09-19 20:02 ` Heiner Kallweit
2018-09-20 6:06 ` David Miller
2018-09-20 6:06 ` [PATCH net-next 1/2] r8169: simplify RTL8169 PHY initialization David Miller
1 sibling, 1 reply; 4+ messages in thread
From: Heiner Kallweit @ 2018-09-19 20:02 UTC (permalink / raw)
To: David Miller, Realtek linux nic maintainers; +Cc: netdev@vger.kernel.org
Setting register 0x82 to value 01 is done a few lines before for all
chip versions <= 06 anyway. And setting PHY register 0x0b to value 00
is done at the end of rtl8169s_hw_phy_config() already. So we can
remove this.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
drivers/net/ethernet/realtek/r8169.c | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index a27bf5807..e2713867c 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -4053,15 +4053,6 @@ static void rtl8169_init_phy(struct net_device *dev, struct rtl8169_private *tp)
RTL_W8(tp, 0x82, 0x01);
}
- if (tp->mac_version == RTL_GIGA_MAC_VER_02) {
- netif_dbg(tp, drv, dev,
- "Set MAC Reg C+CR Offset 0x82h = 0x01h\n");
- RTL_W8(tp, 0x82, 0x01);
- netif_dbg(tp, drv, dev,
- "Set PHY Reg 0x0bh = 0x00h\n");
- rtl_writephy(tp, 0x0b, 0x0000); //w 0x0b 15 0 0
- }
-
/* We may have called phy_speed_down before */
phy_speed_up(dev->phydev);
--
2.19.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH net-next 1/2] r8169: simplify RTL8169 PHY initialization
2018-09-19 20:00 [PATCH net-next 1/2] r8169: simplify RTL8169 PHY initialization Heiner Kallweit
2018-09-19 20:02 ` [PATCH net-next 2/2] r8169: remove duplicated RTL8169s PHY initialization steps Heiner Kallweit
@ 2018-09-20 6:06 ` David Miller
1 sibling, 0 replies; 4+ messages in thread
From: David Miller @ 2018-09-20 6:06 UTC (permalink / raw)
To: hkallweit1; +Cc: nic_swsd, netdev
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Wed, 19 Sep 2018 22:00:24 +0200
> PCI_LATENCY_TIMER is ignored on PCIe, therefore we have to do this
> for the PCI chips (version <= 06) only. Also we can move setting
> PCI_CACHE_LINE_SIZE.
>
> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Applied.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH net-next 2/2] r8169: remove duplicated RTL8169s PHY initialization steps
2018-09-19 20:02 ` [PATCH net-next 2/2] r8169: remove duplicated RTL8169s PHY initialization steps Heiner Kallweit
@ 2018-09-20 6:06 ` David Miller
0 siblings, 0 replies; 4+ messages in thread
From: David Miller @ 2018-09-20 6:06 UTC (permalink / raw)
To: hkallweit1; +Cc: nic_swsd, netdev
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Wed, 19 Sep 2018 22:02:11 +0200
> Setting register 0x82 to value 01 is done a few lines before for all
> chip versions <= 06 anyway. And setting PHY register 0x0b to value 00
> is done at the end of rtl8169s_hw_phy_config() already. So we can
> remove this.
>
> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Applied.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2018-09-20 11:48 UTC | newest]
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2018-09-19 20:00 [PATCH net-next 1/2] r8169: simplify RTL8169 PHY initialization Heiner Kallweit
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2018-09-20 6:06 ` [PATCH net-next 1/2] r8169: simplify RTL8169 PHY initialization David Miller
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