From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Miller Subject: Re: [PATCH net-next 1/2] r8169: simplify RTL8169 PHY initialization Date: Wed, 19 Sep 2018 23:06:46 -0700 (PDT) Message-ID: <20180919.230646.2294063040839968039.davem@davemloft.net> References: <35548e5c-2421-04b6-b6d7-335c1b7fb62d@gmail.com> Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: nic_swsd@realtek.com, netdev@vger.kernel.org To: hkallweit1@gmail.com Return-path: Received: from shards.monkeyblade.net ([23.128.96.9]:35396 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731260AbeITLsa (ORCPT ); Thu, 20 Sep 2018 07:48:30 -0400 In-Reply-To: <35548e5c-2421-04b6-b6d7-335c1b7fb62d@gmail.com> Sender: netdev-owner@vger.kernel.org List-ID: From: Heiner Kallweit Date: Wed, 19 Sep 2018 22:00:24 +0200 > PCI_LATENCY_TIMER is ignored on PCIe, therefore we have to do this > for the PCI chips (version <= 06) only. Also we can move setting > PCI_CACHE_LINE_SIZE. > > Signed-off-by: Heiner Kallweit Applied.