From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Miller Subject: Re: r8169 tx batching(?) causing performance problems Date: Wed, 03 Oct 2018 14:43:34 -0700 (PDT) Message-ID: <20181003.144334.513463899629095170.davem@davemloft.net> References: <20181003.093146.431165270358997515.davem@davemloft.net> <23097.1538562476@warthog.procyon.org.uk> <21374.1538597980@warthog.procyon.org.uk> Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: nic_swsd@realtek.com, netdev@vger.kernel.org To: dhowells@redhat.com Return-path: Received: from shards.monkeyblade.net ([23.128.96.9]:39222 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725799AbeJDEdq (ORCPT ); Thu, 4 Oct 2018 00:33:46 -0400 In-Reply-To: <21374.1538597980@warthog.procyon.org.uk> Sender: netdev-owner@vger.kernel.org List-ID: From: David Howells Date: Wed, 03 Oct 2018 21:19:40 +0100 > David Miller wrote: > >> Probably you are seeing some interrupt mitigation. >> >> It seems there is a difference in how the interrupt mitigation is >> programmed on for 8168 chips vs. others by default. Most get >> all zeros in the IntrMitigate register, whilst for 8168 chips >> a value of 0x5151 is programmed. > > I'm not sure what that means. I can't seem to find a programmer's manual for > the chip. There is a comment which documents what might be the register layout elsewhere in the driver: /* * Undocumented corner. Supposedly: * (TxTimer << 12) | (TxPackets << 8) | (RxTimer << 4) | RxPackets */ RTL_W16(tp, IntrMitigate, 0x0000);