From mboxrd@z Thu Jan  1 00:00:00 1970
From: Andrew Lunn <andrew@lunn.ch>
Subject: Re: CRC errors between mvneta and macb
Date: Mon, 22 Oct 2018 20:19:18 +0200
Message-ID: <20181022181918.GF24112@lunn.ch>
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Cc: Willy Tarreau <w@1wt.eu>, linux-kernel@vger.kernel.org,
        Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
        Antoine Tenart <antoine.tenart@bootlin.com>,
        Gregory CLEMENT <gregory.clement@bootlin.com>,
        Yelena Krivosheev <yelena@marvell.com>,
        Maxime Chevallier <maxime.chevallier@bootlin.com>,
        Nicolas Ferre <nicolas.ferre@microchip.com>,
        netdev@vger.kernel.org
To: Richard Genoud <richard.genoud@gmail.com>
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> I dug more on the subject, and I think I found what Marvell's PHY/MAC
> doesn't like.

Hi Richard

What PHY is being used?

> After analyzing the ethernet frame on the Davicom PHY's output (pin
> TX+), I find out that the FCS errors occurs when the ethernet preamble
> is longer than 56bits. (something like 58 or 60 bits)

Some Marvell PHYs have a register bit which might be of interest: Page
2, register 16, bit 6.

0 = Pad odd nibble preambles in copper receive packets.
1 = Pass as is and do not pad odd nibble preambles in

  Andrew