From: Dan Carpenter <dan.carpenter@oracle.com>
To: kbuild@01.org, Salil Mehta <salil.mehta@huawei.com>
Cc: salil.mehta@huawei.com, mehta.salil@opnsrc.net,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
linuxarm@huawei.com, kbuild-all@01.org, lipeng321@huawei.com,
yisen.zhuang@huawei.com, davem@davemloft.net,
Shiju Jose <shiju.jose@huawei.com>
Subject: Re: [PATCH net-next 6/7] net: hns3: Add enable and process hw errors from PPP
Date: Tue, 23 Oct 2018 14:28:52 +0300 [thread overview]
Message-ID: <20181023112852.4pmcezetrudduvna@mwanda> (raw)
In-Reply-To: <20181019191532.10088-7-salil.mehta@huawei.com>
Hi Shiju,
Thank you for the patch! Perhaps something to improve:
url: https://github.com/0day-ci/linux/commits/Salil-Mehta/Adds-support-of-RAS-Error-Handling-in-HNS3-Driver/20181021-183911
smatch warnings:
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c:700 hclge_log_and_clear_ppp_error() error: uninitialized symbol 'hw_err_lst3'.
# https://github.com/0day-ci/linux/commit/9a8545e85954ec55367e8881d18cc2ae95c56d98
git remote add linux-review https://github.com/0day-ci/linux
git remote update linux-review
git checkout 9a8545e85954ec55367e8881d18cc2ae95c56d98
vim +/hw_err_lst3 +700 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
19049622e Shiju Jose 2018-10-19 653
9a8545e85 Shiju Jose 2018-10-19 654 static int hclge_log_and_clear_ppp_error(struct hclge_dev *hdev, u32 cmd,
9a8545e85 Shiju Jose 2018-10-19 655 enum hclge_err_int_type int_type)
9a8545e85 Shiju Jose 2018-10-19 656 {
9a8545e85 Shiju Jose 2018-10-19 657 enum hnae3_reset_type reset_level = HNAE3_NONE_RESET;
9a8545e85 Shiju Jose 2018-10-19 658 struct device *dev = &hdev->pdev->dev;
9a8545e85 Shiju Jose 2018-10-19 659 const struct hclge_hw_error *hw_err_lst1, *hw_err_lst2, *hw_err_lst3;
9a8545e85 Shiju Jose 2018-10-19 660 struct hclge_desc desc[2];
9a8545e85 Shiju Jose 2018-10-19 661 u32 err_sts;
9a8545e85 Shiju Jose 2018-10-19 662 int ret;
9a8545e85 Shiju Jose 2018-10-19 663
9a8545e85 Shiju Jose 2018-10-19 664 /* read PPP INT sts */
9a8545e85 Shiju Jose 2018-10-19 665 ret = hclge_cmd_query_error(hdev, &desc[0], cmd,
9a8545e85 Shiju Jose 2018-10-19 666 HCLGE_CMD_FLAG_NEXT, 5, int_type);
9a8545e85 Shiju Jose 2018-10-19 667 if (ret) {
9a8545e85 Shiju Jose 2018-10-19 668 dev_err(dev, "failed(=%d) to query PPP interrupt status\n",
9a8545e85 Shiju Jose 2018-10-19 669 ret);
9a8545e85 Shiju Jose 2018-10-19 670 return -EIO;
9a8545e85 Shiju Jose 2018-10-19 671 }
9a8545e85 Shiju Jose 2018-10-19 672
9a8545e85 Shiju Jose 2018-10-19 673 /* log error */
9a8545e85 Shiju Jose 2018-10-19 674 if (cmd == HCLGE_PPP_CMD0_INT_CMD) {
9a8545e85 Shiju Jose 2018-10-19 675 hw_err_lst1 = &hclge_ppp_mpf_int0[0];
9a8545e85 Shiju Jose 2018-10-19 676 hw_err_lst2 = &hclge_ppp_mpf_int1[0];
9a8545e85 Shiju Jose 2018-10-19 677 hw_err_lst3 = &hclge_ppp_pf_int[0];
9a8545e85 Shiju Jose 2018-10-19 678 } else if (cmd == HCLGE_PPP_CMD1_INT_CMD) {
9a8545e85 Shiju Jose 2018-10-19 679 hw_err_lst1 = &hclge_ppp_mpf_int2[0];
9a8545e85 Shiju Jose 2018-10-19 680 hw_err_lst2 = &hclge_ppp_mpf_int3[0];
Not set here.
9a8545e85 Shiju Jose 2018-10-19 681 } else {
9a8545e85 Shiju Jose 2018-10-19 682 dev_err(dev, "invalid command(=%d)\n", cmd);
9a8545e85 Shiju Jose 2018-10-19 683 return -EINVAL;
9a8545e85 Shiju Jose 2018-10-19 684 }
9a8545e85 Shiju Jose 2018-10-19 685
9a8545e85 Shiju Jose 2018-10-19 686 err_sts = le32_to_cpu(desc[0].data[2]);
9a8545e85 Shiju Jose 2018-10-19 687 if (err_sts) {
9a8545e85 Shiju Jose 2018-10-19 688 hclge_log_error(dev, hw_err_lst1, err_sts);
9a8545e85 Shiju Jose 2018-10-19 689 reset_level = HNAE3_FUNC_RESET;
9a8545e85 Shiju Jose 2018-10-19 690 }
9a8545e85 Shiju Jose 2018-10-19 691
9a8545e85 Shiju Jose 2018-10-19 692 err_sts = le32_to_cpu(desc[0].data[3]);
9a8545e85 Shiju Jose 2018-10-19 693 if (err_sts) {
9a8545e85 Shiju Jose 2018-10-19 694 hclge_log_error(dev, hw_err_lst2, err_sts);
9a8545e85 Shiju Jose 2018-10-19 695 reset_level = HNAE3_FUNC_RESET;
9a8545e85 Shiju Jose 2018-10-19 696 }
9a8545e85 Shiju Jose 2018-10-19 697
9a8545e85 Shiju Jose 2018-10-19 698 err_sts = (le32_to_cpu(desc[0].data[4]) >> 8) & 0x3;
9a8545e85 Shiju Jose 2018-10-19 699 if (err_sts) {
9a8545e85 Shiju Jose 2018-10-19 @700 hclge_log_error(dev, hw_err_lst3, err_sts);
^^^^^^^^^^^
Uninitialized.
9a8545e85 Shiju Jose 2018-10-19 701 reset_level = HNAE3_FUNC_RESET;
9a8545e85 Shiju Jose 2018-10-19 702 }
9a8545e85 Shiju Jose 2018-10-19 703
9a8545e85 Shiju Jose 2018-10-19 704 /* clear PPP INT */
9a8545e85 Shiju Jose 2018-10-19 705 ret = hclge_cmd_clear_error(hdev, &desc[0], NULL, 0,
9a8545e85 Shiju Jose 2018-10-19 706 HCLGE_CMD_FLAG_NEXT);
9a8545e85 Shiju Jose 2018-10-19 707 if (ret) {
9a8545e85 Shiju Jose 2018-10-19 708 dev_err(dev, "failed(=%d) to clear PPP interrupt status\n",
9a8545e85 Shiju Jose 2018-10-19 709 ret);
9a8545e85 Shiju Jose 2018-10-19 710 return -EIO;
9a8545e85 Shiju Jose 2018-10-19 711 }
9a8545e85 Shiju Jose 2018-10-19 712
9a8545e85 Shiju Jose 2018-10-19 713 return 0;
9a8545e85 Shiju Jose 2018-10-19 714 }
9a8545e85 Shiju Jose 2018-10-19 715
next prev parent reply other threads:[~2018-10-23 11:28 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-19 19:15 [PATCH net-next 0/7] Adds support of RAS Error Handling in HNS3 Driver Salil Mehta
2018-10-19 19:15 ` [PATCH net-next 1/7] net: hns3: Add PCIe AER callback error_detected Salil Mehta
2018-10-19 19:15 ` [PATCH net-next 2/7] net: hns3: Add PCIe AER error recovery Salil Mehta
2018-10-19 19:15 ` [PATCH net-next 3/7] net: hns3: Add support to enable and disable hw errors Salil Mehta
2018-10-19 19:15 ` [PATCH net-next 4/7] net: hns3: Add enable and process common ecc errors Salil Mehta
2018-10-19 19:15 ` [PATCH net-next 5/7] net: hns3: Add enable and process hw errors from IGU, EGU and NCSI Salil Mehta
2018-10-19 19:15 ` [PATCH net-next 6/7] net: hns3: Add enable and process hw errors from PPP Salil Mehta
2018-10-23 11:28 ` Dan Carpenter [this message]
2018-10-23 21:37 ` Salil Mehta
2018-10-24 6:19 ` Dan Carpenter
2018-10-24 6:22 ` Salil Mehta
2018-10-19 19:15 ` [PATCH net-next 7/7] net: hns3: Add enable and process hw errors of TM scheduler Salil Mehta
2018-10-23 2:32 ` [PATCH net-next 0/7] Adds support of RAS Error Handling in HNS3 Driver David Miller
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