From mboxrd@z Thu Jan 1 00:00:00 1970 From: Pankaj Bansal Subject: [PATCH] arm64: dts: lx2160aqds: Add mdio mux nodes Date: Thu, 15 Nov 2018 12:12:05 +0000 Message-ID: <20181115173752.22482-1-pankaj.bansal@nxp.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Cc: "netdev@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Pankaj Bansal To: Shawn Guo , Leo Li , Andrew Lunn , Florian Fainelli Return-path: Received: from mail-eopbgr40056.outbound.protection.outlook.com ([40.107.4.56]:45312 "EHLO EUR03-DB5-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729155AbeKOWTq (ORCPT ); Thu, 15 Nov 2018 17:19:46 -0500 Content-Language: en-US Sender: netdev-owner@vger.kernel.org List-ID: The two external MDIO buses used to communicate with phy devices that are external to SOC are muxed in LX2160AQDS board. These buses can be routed to any one of the eight IO slots on LX2160AQDS board depending on value in fpga register 0x54. Additionally the external MDIO1 is used to communicate to the onboard RGMII phy devices. The mdio1 is controlled by bits 4-7 of fpga register and mdio2 is controlled by bits 0-3 of fpga register. Signed-off-by: Pankaj Bansal --- Notes: This patch depends on following patches: [1]https://patchwork.kernel.org/cover/10658863/ [2]https://patchwork.codeaurora.org/patch/637861/ .../boot/dts/freescale/fsl-lx2160a-qds.dts | 116 +++++++++++++++++ .../boot/dts/freescale/fsl-lx2160a.dtsi | 23 ++++ 2 files changed, 139 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64= /boot/dts/freescale/fsl-lx2160a-qds.dts index 8a0305a2b778..39aa2731ddfa 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts @@ -54,6 +54,121 @@ &i2c0 { status =3D "okay"; =20 + fpga@66 { + compatible =3D "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c"; + reg =3D <0x66>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + mdio-mux-1@54 { + mdio-parent-bus =3D <&emdio1>; + reg =3D <0x54>; /* BRDCFG4 */ + mux-mask =3D <0xf8>; /* EMI1_MDIO */ + #address-cells=3D<1>; + #size-cells =3D <0>; + + mdio@0 { + reg =3D <0x00>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@40 { + reg =3D <0x40>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@c0 { + reg =3D <0xc0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@c8 { + reg =3D <0xc8>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@d0 { + reg =3D <0xd0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@d8 { + reg =3D <0xd8>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@e0 { + reg =3D <0xe0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@e8 { + reg =3D <0xe8>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@f0 { + reg =3D <0xf0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@f8 { + reg =3D <0xf8>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + + mdio-mux-2@54 { + mdio-parent-bus =3D <&emdio2>; + reg =3D <0x54>; /* BRDCFG4 */ + mux-mask =3D <0x07>; /* EMI2_MDIO */ + #address-cells=3D<1>; + #size-cells =3D <0>; + + mdio@0 { + reg =3D <0x00>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@1 { + reg =3D <0x01>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@2 { + reg =3D <0x02>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@3 { + reg =3D <0x03>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@4 { + reg =3D <0x04>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@5 { + reg =3D <0x05>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@6 { + reg =3D <0x06>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + mdio@7 { + reg =3D <0x07>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + }; + i2c-mux@77 { compatible =3D "nxp,pca9547"; reg =3D <0x77>; @@ -118,3 +233,4 @@ &usb1 { status =3D "okay"; }; + diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/bo= ot/dts/freescale/fsl-lx2160a.dtsi index 6ce0677c3096..518882b05f03 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -780,5 +780,28 @@ ; dma-coherent; }; + /* TODO: WRIOP (CCSR?) */ + /* WRIOP0: 0x8B8_0000, E-MDIO1: 0x1_6000 */ + emdio1: mdio@0x8B96000 { + compatible =3D "fsl,fman-memac-mdio"; + reg =3D <0x0 0x8B96000 0x0 0x1000>; + device_type =3D "mdio"; /* TODO: is this necessary? */ + little-endian; /* force the driver in LE mode */ + + /* Not necessary on the QDS, but needed on the RDB*/ + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + /* WRIOP0: 0x8B8_0000, E-MDIO2: 0x1_7000 */ + emdio2: mdio@0x8B97000 { + compatible =3D "fsl,fman-memac-mdio"; + reg =3D <0x0 0x8B97000 0x0 0x1000>; + device_type =3D "mdio"; /* TODO: is this necessary? */ + little-endian; /* force the driver in LE mode */ + + #address-cells =3D <1>; + #size-cells =3D <0>; + }; }; }; + --=20 2.17.1