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From: Andrew Lunn <andrew@lunn.ch>
To: Steve Douthit <stephend@silicom-usa.com>
Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>,
	"David S. Miller" <davem@davemloft.net>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>
Subject: Re: [PATCH net-next 1/2] ixgbe: register a mdiobus
Date: Fri, 30 Nov 2018 14:21:30 +0100	[thread overview]
Message-ID: <20181130132130.GA11747@lunn.ch> (raw)
In-Reply-To: <20181129185345.17235-2-stephend@silicom-usa.com>

Hi Steve

Cool to see another interface being made DSA capable.

> +/**
> + *  ixgbe_msca - Write the command register and poll for completion/timeout
> + *  @hw: pointer to hardware structure
> + *  @cmd: command register value to write
> + **/
> +static s32 ixgbe_msca_cmd(struct ixgbe_hw *hw, u32 cmd)
> +{
> +	u32 i;
> +
> +	IXGBE_WRITE_REG(hw, IXGBE_MSCA, cmd);
> +
> +	for (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {
> +		udelay(10);
> +		cmd = IXGBE_READ_REG(hw, IXGBE_MSCA);
> +		if (!(cmd & IXGBE_MSCA_MDI_COMMAND))
> +			return 0;
> +	}
> +
> +	return -ETIMEDOUT;

Please consider using readx_poll_timeout()

> +}
> +
> +/**
> + *  ixgbe_msca - Use device_id to figure out if MDIO bus is shared between MACs.
> + *  The embedded x550(s) in the C3000 line of SoCs only have a single mii_bus
> + *  shared between all MACs, and that introduces some new mask flags that need
> + *  to be passed to the *_swfw_sync callbacks.
> + *  @hw: pointer to hardware structure
> + **/
> +static bool ixgbe_is_shared_mii(struct ixgbe_hw *hw)
> +{
> +	switch (hw->device_id) {
> +	case IXGBE_DEV_ID_X550EM_A_KR:
> +	case IXGBE_DEV_ID_X550EM_A_KR_L:
> +	case IXGBE_DEV_ID_X550EM_A_SFP_N:
> +	case IXGBE_DEV_ID_X550EM_A_SGMII:
> +	case IXGBE_DEV_ID_X550EM_A_SGMII_L:
> +	case IXGBE_DEV_ID_X550EM_A_10G_T:
> +	case IXGBE_DEV_ID_X550EM_A_SFP:
> +	case IXGBE_DEV_ID_X550EM_A_1G_T:
> +	case IXGBE_DEV_ID_X550EM_A_1G_T_L:
> +		return true;
> +	}
> +
> +	return false;
> +}
> +
> +/**
> + *  ixgbe_mii_bus_read - Read a clause 22/45 register
> + *  @hw: pointer to hardware structure
> + *  @addr: address
> + *  @regnum: register number
> + **/
> +static s32 ixgbe_mii_bus_read(struct mii_bus *bus, int addr, int regnum)
> +{
> +	struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)bus->priv;
> +	struct ixgbe_hw *hw = &adapter->hw;
> +	u32 hwaddr, cmd, gssr = hw->phy.phy_semaphore_mask;
> +	s32 data;
> +
> +	if (ixgbe_is_shared_mii(hw)) {
> +		gssr |= IXGBE_GSSR_TOKEN_SM;
> +		if (hw->bus.lan_id)
> +			gssr |= IXGBE_GSSR_PHY1_SM;
> +		else
> +			gssr |= IXGBE_GSSR_PHY0_SM;
> +	}

Could you explain this shared bus a bit more.  If there is only one
physical MDIO bus, you should only register one bus with Linux. So i
would not normally expect to see ixgbe_is_shared_mii() sort of
statements into the read/write functions. That tends to happen at the
point you are registering the MDIO bus, and when looking for the MACs
PHY on the bus.

    Andrew

  reply	other threads:[~2018-12-01  0:30 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-29 18:54 [PATCH net-next 0/2] Add mii_bus to ixgbe driver for dsa devs Steve Douthit
2018-11-29 18:54 ` [PATCH net-next 1/2] ixgbe: register a mdiobus Steve Douthit
2018-11-30 13:21   ` Andrew Lunn [this message]
2018-11-30 15:22     ` Steve Douthit
2018-11-30 16:34       ` Andrew Lunn
2018-11-30 17:34         ` Steve Douthit
2018-11-30 17:43           ` Florian Fainelli
2018-11-30 18:43             ` Steve Douthit
2018-11-30 19:20           ` Andrew Lunn
2018-11-29 18:54 ` [PATCH net-next 2/2] ixgbe: use mii_bus to handle MII related ioctls Steve Douthit
2018-11-29 19:03 ` [PATCH net-next 0/2] Add mii_bus to ixgbe driver for dsa devs Jeff Kirsher
2018-11-29 22:19   ` Steve Douthit
2018-11-29 22:54     ` Jeff Kirsher

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