From mboxrd@z Thu Jan  1 00:00:00 1970
From: David Miller <davem@davemloft.net>
Subject: Re: [RFC bpf-next 1/7] bpf: interpreter support BPF_ALU | BPF_ARSH
Date: Tue, 04 Dec 2018 08:43:11 -0800 (PST)
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From: Jiong Wang <jiong.wang@netronome.com>
Date: Tue,  4 Dec 2018 04:56:29 -0500

> This patch implements interpreting BPF_ALU | BPF_ARSH. Do arithmetic right
> shift on low 32-bit sub-register, and zero the high 32 bits.
> 
> Reviewed-by: Jakub Kicinski <jakub.kicinski@netronome.com>
> Signed-off-by: Jiong Wang <jiong.wang@netronome.com>

I just want to say that this behavior is interesting because on most
cpus that have a 32-bit and 64-bit variant, the 32-bit arithmetic
right shift typically sign extends to 64-bit rather than zero extends
which is what is being defined here.

Well, definitely, sparc64 behaves this way.