From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Lunn Subject: Re: DSA: external phy address and port number of switch conflicts Date: Fri, 14 Dec 2018 09:38:04 +0100 Message-ID: <20181214083804.GD3703@lunn.ch> References: <5C12F555.2070305@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Cc: netdev@vger.kernel.org To: John Rama Return-path: Received: from vps0.lunn.ch ([185.16.172.187]:47430 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726494AbeLNIiG (ORCPT ); Fri, 14 Dec 2018 03:38:06 -0500 Content-Disposition: inline In-Reply-To: <5C12F555.2070305@gmail.com> Sender: netdev-owner@vger.kernel.org List-ID: On Thu, Dec 13, 2018 at 07:12:05PM -0500, John Rama wrote: > Dear DSA experts > > My name is John. > > I'm working for our custom board which has the Marvel 88e5050 ethernet switch > as shown below, and trying to make the system works using DSA subsystem. 88e5050 is a new switch to me. So i don't know anything about its register layout. > I found one problem and have a question. > > - System > - i.MX6 and Marvel 88e5050 Switch(PHY addr is 0x10) > - port1-5 has integrated PHY > - port7 is connected to Marvel 88e1510 PHY(PHY addr is 0x1) > > 0x10 > +------------+ +-----------------+ > | | | Marvel 88e5050 | > | | RGMII | port1 | > | IMX6 +---------+ port6 | > | | | port2 | > | | MDIO | | > | +-+-------+ port3 | > | | | | | > +------------+ | | port4 | > | | | > +-+-+ | port5 | > | |SGMII| | > |PHY|-----| port7 | > | | | | > +---+ +-----------------+ > Marvel 88e1510 > 0x1 > I'm using a little bit old kernel,4.1.15. Since you have the switch in single address mode, i don't see why this should not work. But as Florian said, please update to a new kernel, and swap to using the new binding with the properties inside the IMX MDIO bus. Andrew