From mboxrd@z Thu Jan 1 00:00:00 1970 From: Martin Schwidefsky Subject: Re: [PATH bpf-next 09/13] s390: bpf: implement jitting of JMP32 Date: Thu, 20 Dec 2018 07:47:56 +0100 Message-ID: <20181220074756.10b7634d@mschwideX1> References: <1545259460-13376-1-git-send-email-jiong.wang@netronome.com> <1545259460-13376-10-git-send-email-jiong.wang@netronome.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8bit Cc: ast@kernel.org, daniel@iogearbox.net, netdev@vger.kernel.org, oss-drivers@netronome.com, Heiko Carstens To: Jiong Wang Return-path: Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:46870 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725300AbeLTGsH (ORCPT ); Thu, 20 Dec 2018 01:48:07 -0500 Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id wBK6cn9c118788 for ; Thu, 20 Dec 2018 01:48:06 -0500 Received: from e06smtp07.uk.ibm.com (e06smtp07.uk.ibm.com [195.75.94.103]) by mx0a-001b2d01.pphosted.com with ESMTP id 2pg59pta0j-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 20 Dec 2018 01:48:05 -0500 Received: from localhost by e06smtp07.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 20 Dec 2018 06:48:03 -0000 In-Reply-To: <1545259460-13376-10-git-send-email-jiong.wang@netronome.com> Sender: netdev-owner@vger.kernel.org List-ID: On Wed, 19 Dec 2018 17:44:16 -0500 Jiong Wang wrote: > This patch implements code-gen for new JMP32 instructions on s390. > > Cc: Martin Schwidefsky > Cc: Heiko Carstens > Signed-off-by: Jiong Wang > --- > arch/s390/net/bpf_jit_comp.c | 12 ++++++++---- > 1 file changed, 8 insertions(+), 4 deletions(-) > > diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c > index 3ff758e..c7101e5 100644 > --- a/arch/s390/net/bpf_jit_comp.c > +++ b/arch/s390/net/bpf_jit_comp.c > @@ -1186,21 +1186,25 @@ static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i > /* lgfi %w1,imm (load sign extend imm) */ > EMIT6_IMM(0xc0010000, REG_W1, imm); > /* cgrj %dst,%w1,mask,off */ Please correct the comment about the instruction as well. Dependent on the BPF_JMP_SUBOP_32BIT in src_reg the instruction is either cgrj or crj. > - EMIT6_PCREL(0xec000000, 0x0064, dst_reg, REG_W1, i, off, mask); > + EMIT6_PCREL(0xec000000, src_reg ? 0x0076 : 0x0064, > + dst_reg, REG_W1, i, off, mask); > break; > branch_ku: > /* lgfi %w1,imm (load sign extend imm) */ > EMIT6_IMM(0xc0010000, REG_W1, imm); > /* clgrj %dst,%w1,mask,off */ Same here, dependent on src_reg either clgrj or clrj. > - EMIT6_PCREL(0xec000000, 0x0065, dst_reg, REG_W1, i, off, mask); > + EMIT6_PCREL(0xec000000, src_reg ? 0x0077 : 0x0065, > + dst_reg, REG_W1, i, off, mask); > break; > branch_xs: > /* cgrj %dst,%src,mask,off */ Same same, dependent on imm either cgrj or crj. > - EMIT6_PCREL(0xec000000, 0x0064, dst_reg, src_reg, i, off, mask); > + EMIT6_PCREL(0xec000000, imm ? 0x0076 : 0x0064, > + dst_reg, src_reg, i, off, mask); > break; > branch_xu: > /* clgrj %dst,%src,mask,off */ And again, dependent on imm either clgrj or clrj. > - EMIT6_PCREL(0xec000000, 0x0065, dst_reg, src_reg, i, off, mask); > + EMIT6_PCREL(0xec000000, imm ? 0x0077 : 0x0065, > + dst_reg, src_reg, i, off, mask); > break; > branch_oc: > /* brc mask,jmp_off (branch instruction needs 4 bytes) */ -- blue skies, Martin. "Reality continues to ruin my life." - Calvin.