From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: "Paul Kocialkowski" <paul.kocialkowski@bootlin.com>,
"Florian Fainelli" <f.fainelli@gmail.com>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
netdev@vger.kernel.org,
"Mylène Josserand" <mylene.josserand@bootlin.com>
Subject: Re: Handling an Extra Signal at PHY Reset
Date: Wed, 20 Feb 2019 09:06:51 +0100 [thread overview]
Message-ID: <20190220090651.0e00f284@windsurf> (raw)
In-Reply-To: <20190219133629.GN14879@lunn.ch>
On Tue, 19 Feb 2019 14:36:29 +0100
Andrew Lunn <andrew@lunn.ch> wrote:
> This seems like an odd design. I've normally seen weak pull up/down
> resistors, not a switch, so i'm wondering why it is designed like
> this.
The key point here is that this "CONFIG" pin of the PHY is used during
reset to configure the PHY, but then once the reset sequence is
finished, this pin is used for PTP. From the datasheet, section 2.28.1
"PTP Control":
"""
To support the PTP Time Stamping function, the device has four pins
that are global to the entire PHY:
- PTP clock input pin (The CONFIG pin is used for this purpose.)
- PTP Event Request input pin (The LED[1] pin is used for this purpose)
- PTP Event Request input pin (The LED[1] pin is used for this purpose)
- Interrupt Pin (The LED[2] pin is used for this purpose)
"""
A bit further down in the datasheet:
"After configuration is completed and the external clock source is
enabled, the CONFIG pin is used as the external 125 Mhz reference clock
input"
So that's why our design as a switch: it allows the CONFIG pin to be
used for configuration during the reset sequence, and then as the pin
for the PTP clock input.
Does that clarify why the CONFIG pin is not simply connected to some
static pull-up/pull-down ?
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2019-02-20 8:06 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-19 9:14 Handling an Extra Signal at PHY Reset Paul Kocialkowski
2019-02-19 9:36 ` Thomas Petazzoni
2019-02-19 12:53 ` Paul Kocialkowski
2019-02-19 13:36 ` Andrew Lunn
2019-02-19 15:06 ` Paul Kocialkowski
2019-02-19 15:40 ` Andrew Lunn
2019-02-20 8:06 ` Thomas Petazzoni [this message]
2019-02-19 16:07 ` Florian Fainelli
2019-02-21 9:05 ` Paul Kocialkowski
2019-02-21 1:49 ` Andrew Lunn
2019-02-21 8:50 ` Paul Kocialkowski
2019-02-21 14:04 ` Andrew Lunn
2019-02-27 8:19 ` Paul Kocialkowski
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