From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A986C43381 for ; Thu, 21 Feb 2019 10:23:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0BC7D21734 for ; Thu, 21 Feb 2019 10:23:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1550744635; bh=kqHd+R7AAxtsHZOr8BvpbLO3VlnFcBbCEilKEFol7dE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=ZbV+D9x677+PGO9CcotsBw7R+6LKg4A7HhxXaTJM5r1/dckzmlISGGl2905Vf1KAe A5TNMBZblXLMaUh8EY958hIzL8sZlm7dy+8AtkYZ9bilxno7RSYFBrkCQeAXAPXMnE m1zhvevBPgrM+cN0JwkkiBXqaS0p/g+xuT16pgwA= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727632AbfBUKXy (ORCPT ); Thu, 21 Feb 2019 05:23:54 -0500 Received: from mail.kernel.org ([198.145.29.99]:42682 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727457AbfBUKXx (ORCPT ); Thu, 21 Feb 2019 05:23:53 -0500 Received: from localhost.localdomain (unknown [171.76.105.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 003EF20855; Thu, 21 Feb 2019 10:23:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1550744633; bh=kqHd+R7AAxtsHZOr8BvpbLO3VlnFcBbCEilKEFol7dE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sHaHz9wvo7bTWCcbL5qyguvNmc9qrPKPSWAhZwICSdLNsgmL0uFT8vTnBK4QiL4EL +cSgw0DH66QXf84SXQrFZ7Cx+UyM7RMlZPbvV8BnBw9ZCMTLlRFIDQKciS454WQSei fGU8Zz6W4T8Pwvf3AGbaEJ4wGbtRemE9qs8sdrN4= From: Vinod Koul To: David S Miller Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Vinod Koul , netdev@vger.kernel.org, Niklas Cassel , Andrew Lunn , Florian Fainelli , "Nori, Sekhar" , Peter Ujfalusi , Marc Gonzalez , Peter Ujfalusi Subject: [PATCH net-next v4 2/2] net: phy: at803x: disable delay only for RGMII mode Date: Thu, 21 Feb 2019 15:53:15 +0530 Message-Id: <20190221102315.12946-3-vkoul@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190221102315.12946-1-vkoul@kernel.org> References: <20190221102315.12946-1-vkoul@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Per "Documentation/devicetree/bindings/net/ethernet.txt" RGMII mode should not have delay in PHY whereas RGMII_ID and RGMII_RXID/RGMII_TXID can have delay in PHY. So disable the delay only for RGMII mode and enable for other modes. Also treat the default case as disabled delays. Fixes: cd28d1d6e52e: ("net: phy: at803x: Disable phy delay for RGMII mode") Reported-by: Peter Ujfalusi Reviewed-by: Niklas Cassel Tested-by: Peter Ujfalusi Signed-off-by: Vinod Koul --- drivers/net/phy/at803x.c | 53 +++++++++++++++++++++++++++++++--------- 1 file changed, 42 insertions(+), 11 deletions(-) diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c index c6e7d800fd7a..a37532aac4b4 100644 --- a/drivers/net/phy/at803x.c +++ b/drivers/net/phy/at803x.c @@ -110,6 +110,18 @@ static int at803x_debug_reg_mask(struct phy_device *phydev, u16 reg, return phy_write(phydev, AT803X_DEBUG_DATA, val); } +static int at803x_enable_rx_delay(struct phy_device *phydev) +{ + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, 0, + AT803X_DEBUG_RX_CLK_DLY_EN); +} + +static int at803x_enable_tx_delay(struct phy_device *phydev) +{ + return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_5, 0, + AT803X_DEBUG_TX_CLK_DLY_EN); +} + static int at803x_disable_rx_delay(struct phy_device *phydev) { return at803x_debug_reg_mask(phydev, AT803X_DEBUG_REG_0, @@ -255,23 +267,42 @@ static int at803x_config_init(struct phy_device *phydev) if (ret < 0) return ret; - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID || - phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || - phydev->interface == PHY_INTERFACE_MODE_RGMII) { - ret = at803x_disable_rx_delay(phydev); + /* The RX and TX delay default is: + * after HW reset: RX delay enabled and TX delay disabled + * after SW reset: RX delay enabled, while TX delay retains the + * value before reset. + * + * So let's first disable the RX and TX delays in PHY and enable + * them based on the mode selected (this also takes care of RGMII + * mode where we expect delays to be disabled) + */ + + ret = at803x_disable_rx_delay(phydev); + if (ret < 0) + return ret; + ret = at803x_disable_tx_delay(phydev); + if (ret < 0) + return ret; + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) { + /* If RGMII_ID or RGMII_RXID are specified enable RX delay, + * otherwise keep it disabled + */ + ret = at803x_enable_rx_delay(phydev); if (ret < 0) return ret; } - if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID || - phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || - phydev->interface == PHY_INTERFACE_MODE_RGMII) { - ret = at803x_disable_tx_delay(phydev); - if (ret < 0) - return ret; + if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) { + /* If RGMII_ID or RGMII_TXID are specified enable TX delay, + * otherwise keep it disabled + */ + ret = at803x_enable_tx_delay(phydev); } - return 0; + return ret; } static int at803x_ack_interrupt(struct phy_device *phydev) -- 2.20.1