From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.0 required=3.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE589C43381 for ; Tue, 26 Feb 2019 18:24:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 830D5217F5 for ; Tue, 26 Feb 2019 18:24:57 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=netronome-com.20150623.gappssmtp.com header.i=@netronome-com.20150623.gappssmtp.com header.b="xk2shFHz" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729143AbfBZSY4 (ORCPT ); Tue, 26 Feb 2019 13:24:56 -0500 Received: from mail-qk1-f195.google.com ([209.85.222.195]:34284 "EHLO mail-qk1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729067AbfBZSYz (ORCPT ); Tue, 26 Feb 2019 13:24:55 -0500 Received: by mail-qk1-f195.google.com with SMTP id a15so8199652qkc.1 for ; Tue, 26 Feb 2019 10:24:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=netronome-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=v1Ij22rHmnuvB5yG5dL9XzWHui3HB6WTU7TxRDPpXhA=; b=xk2shFHz7x2B2YI9VMyGkjgS75KT5X/oGmFx2kHcOdxAtgzka5T+x4nwDyg7DrTKwy +R1pd7fkwPlrZJ7vl4g9v9rwkdKhEH6I2cgDHn/qcBgijKoLT4LVdEQWJvUkGbxSwWTj 7afCGJ45BxtBCyHxvDYPoEK/uCdL8AN2WVnxwd+wL5k1HLdujIOiUCK3AteoZ+JHYzmN mPXh4VSZ7H+XSMFZu3M29uuJxLmkI9SHB/ZGUmst8qpUNEWl4bzWOXH6V+dDVNpqt1SZ Qa1KuNJyQTUGedCRLSNEL8S99MXTimEUcXCOnvSmNJzti9Gnx5NLONln34BuGF2ixSsv CxmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=v1Ij22rHmnuvB5yG5dL9XzWHui3HB6WTU7TxRDPpXhA=; b=q91LeYDk2h43S8w6PdvhU0TXkCBeGc92kJDc2Hc9boOP4XNkrqz48dPZQe0bz7tL1r 3orE/yGxOS7/rnMbcHc23FvORMg9Ze+KX7HB5wYKXwerbQQy0UPt9xwqTo0G6i0hY2y3 xEng0DZd82bOLrxMo9lsMK3OlVnTMyRUZComkjuERfdCaKl1xQnTMbdTrZDhvX+8AsOU tm9PEJaCcrIp41DCzyIY1h5HC4yHXKKbyPVrI0SEvfKk9X3MBp1ZAzwDj8J2aYqnyUfh SVdLZbYOgcQyWfa5H9h10Qf/RKTW2mI6n3ezd90S4Fe7GLAQgzFgcrmZ6Mh8abIoF2LN XfpQ== X-Gm-Message-State: AHQUAuZMRYc72LT8laydkCuvS/mmd3lAYOnLgELhLFBx12q2R2xIrB6v RUrwVRDv2cLtzqe9sNGPbGN7Ng== X-Google-Smtp-Source: AHgI3IaBIRTJc2ogAj5y6Dh4b85nJ2e86xsuUs0Rzgjr5NxqLcYimivp86DGQyo5m9kfSgLYxx2/iw== X-Received: by 2002:ae9:c30f:: with SMTP id n15mr17839792qkg.227.1551205493704; Tue, 26 Feb 2019 10:24:53 -0800 (PST) Received: from jkicinski-Precision-T1700.netronome.com ([66.60.152.14]) by smtp.gmail.com with ESMTPSA id u31sm9733892qth.15.2019.02.26.10.24.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 26 Feb 2019 10:24:53 -0800 (PST) From: Jakub Kicinski To: davem@davemloft.net, jiri@resnulli.us Cc: oss-drivers@netronome.com, netdev@vger.kernel.org, Jakub Kicinski Subject: [PATCH net-next 4/8] devlink: allow subports on devlink PCI ports Date: Tue, 26 Feb 2019 10:24:32 -0800 Message-Id: <20190226182436.23811-5-jakub.kicinski@netronome.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20190226182436.23811-1-jakub.kicinski@netronome.com> References: <20190226182436.23811-1-jakub.kicinski@netronome.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org PCI endpoint corresponds to a PCI device, but such device can have one more more logical device ports associated with it. We need a way to distinguish those. Add a PCI subport in the dumps and print the info in phys_port_name appropriately. This is not equivalent to port splitting, there is no split group. It's just a way of representing multiple netdevs on a single PCI function. Note that the quality of being multiport pertains only to the PCI function itself. A PF having multiple netdevs does not mean that its VFs will also have multiple, or that VFs are associated with any particular port of a multiport VF. Example (bus 05 device has subports, bus 82 has only one port per function): $ devlink port pci/0000:05:00.0/0: type eth netdev enp5s0np0 flavour physical pci/0000:05:00.0/10000: type eth netdev enp5s0npf0s0 flavour pci_pf pf 0 subport 0 pci/0000:05:00.0/4: type eth netdev enp5s0np1 flavour physical pci/0000:05:00.0/11000: type eth netdev enp5s0npf0s1 flavour pci_pf pf 0 subport 1 pci/0000:82:00.0/0: type eth netdev p4p1 flavour physical pci/0000:82:00.0/10000: type eth netdev eth0 flavour pci_pf pf 0 $ devlink -jp port { "port": { "pci/0000:05:00.0/0": { "type": "eth", "netdev": "enp5s0np0", "flavour": "physical" }, "pci/0000:05:00.0/10000": { "type": "eth", "netdev": "enp5s0npf0s0", "flavour": "pci_pf", "pf": 0, "subport": 0 }, "pci/0000:05:00.0/4": { "type": "eth", "netdev": "enp5s0np1", "flavour": "physical" }, "pci/0000:05:00.0/11000": { "type": "eth", "netdev": "enp5s0npf0s1", "flavour": "pci_pf", "pf": 0, "subport": 1 }, "pci/0000:82:00.0/0": { "type": "eth", "netdev": "p4p1", "flavour": "physical" }, "pci/0000:82:00.0/10000": { "type": "eth", "netdev": "eth0", "flavour": "pci_pf", "pf": 0 } } } Signed-off-by: Jakub Kicinski --- .../net/ethernet/netronome/nfp/nfp_devlink.c | 3 +- include/net/devlink.h | 9 ++++-- include/uapi/linux/devlink.h | 1 + net/core/devlink.c | 29 ++++++++++++++++--- 4 files changed, 35 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/netronome/nfp/nfp_devlink.c b/drivers/net/ethernet/netronome/nfp/nfp_devlink.c index 36976e37d162..bb07be4117a3 100644 --- a/drivers/net/ethernet/netronome/nfp/nfp_devlink.c +++ b/drivers/net/ethernet/netronome/nfp/nfp_devlink.c @@ -375,7 +375,8 @@ nfp_devlink_port_init_pci(struct devlink *devlink, struct nfp_port *port, { devlink_port_type_eth_set(&port->dl_port, port->netdev); devlink_port_attrs_pci_set(&port->dl_port, flavour, - port->pf_id, port->vf_id); + port->pf_id, port->vf_id, + port->pf_split, port->pf_split_id); return 0; } diff --git a/include/net/devlink.h b/include/net/devlink.h index b5376ef492f1..13e0a479c546 100644 --- a/include/net/devlink.h +++ b/include/net/devlink.h @@ -53,6 +53,8 @@ struct devlink_port_attrs { struct { u32 pf_number; u32 vf_number; + bool multiport; + u32 subport_number; } pci; }; }; @@ -580,7 +582,8 @@ void devlink_port_attrs_set(struct devlink_port *devlink_port, u32 split_subport_number); void devlink_port_attrs_pci_set(struct devlink_port *devlink_port, enum devlink_port_flavour flavour, - u32 pf_number, u32 vf_number); + u32 pf_number, u32 vf_number, + bool multiport, u32 subport_number); int devlink_port_get_phys_port_name(struct devlink_port *devlink_port, char *name, size_t len); int devlink_sb_register(struct devlink *devlink, unsigned int sb_index, @@ -797,7 +800,9 @@ static inline void devlink_port_attrs_set(struct devlink_port *devlink_port, static inline void devlink_port_attrs_pci_set(struct devlink_port *devlink_port, enum devlink_port_flavour flavour, - u32 pf_number, u32 vf_number) + u32 pf_number, u32 vf_number, + bool multiport, + u32 subport_number) { } diff --git a/include/uapi/linux/devlink.h b/include/uapi/linux/devlink.h index 9ce76d4f640d..417ae8233cce 100644 --- a/include/uapi/linux/devlink.h +++ b/include/uapi/linux/devlink.h @@ -336,6 +336,7 @@ enum devlink_attr { DEVLINK_ATTR_PORT_PCI_PF_NUMBER, /* u32 */ DEVLINK_ATTR_PORT_PCI_VF_NUMBER, /* u32 */ + DEVLINK_ATTR_PORT_PCI_SUBPORT, /* u32 */ /* add new attributes above here, update the policy in devlink.c */ diff --git a/net/core/devlink.c b/net/core/devlink.c index af177284830b..6cdf7e87d7fc 100644 --- a/net/core/devlink.c +++ b/net/core/devlink.c @@ -541,6 +541,11 @@ static int devlink_nl_port_attrs_put(struct sk_buff *msg, if (nla_put_u32(msg, DEVLINK_ATTR_PORT_PCI_PF_NUMBER, attrs->pci.pf_number)) return -EMSGSIZE; + + if (attrs->pci.multiport && + nla_put_u32(msg, DEVLINK_ATTR_PORT_PCI_SUBPORT, + attrs->pci.subport_number)) + return -EMSGSIZE; return 0; default: return -EINVAL; @@ -5449,10 +5454,13 @@ EXPORT_SYMBOL_GPL(devlink_port_attrs_set); * @pf_number: PCI PF number, in multi-host mapping to hosts depends * on the platform * @vf_number: PCI VF number within given PF (ignored for PF itself) + * @multiport: PCI function has more than one logical port + * @subport_number: PCI function has more than one logical port */ void devlink_port_attrs_pci_set(struct devlink_port *devlink_port, enum devlink_port_flavour flavour, - u32 pf_number, u32 vf_number) + u32 pf_number, u32 vf_number, + bool multiport, u32 subport_number) { struct devlink_port_attrs *attrs = &devlink_port->attrs; @@ -5463,6 +5471,8 @@ void devlink_port_attrs_pci_set(struct devlink_port *devlink_port, attrs->flavour = flavour; attrs->pci.pf_number = pf_number; attrs->pci.vf_number = vf_number; + attrs->pci.multiport = multiport; + attrs->pci.subport_number = subport_number; devlink_port_notify(devlink_port, DEVLINK_CMD_PORT_NEW); } EXPORT_SYMBOL_GPL(devlink_port_attrs_pci_set); @@ -5492,11 +5502,22 @@ int devlink_port_get_phys_port_name(struct devlink_port *devlink_port, WARN_ON(1); return -EINVAL; case DEVLINK_PORT_FLAVOUR_PCI_PF: - n = snprintf(name, len, "pf%u", attrs->pci.pf_number); + if (!attrs->pci.multiport) + n = snprintf(name, len, "pf%u", attrs->pci.pf_number); + else + n = snprintf(name, len, "pf%us%u", attrs->pci.pf_number, + attrs->pci.subport_number); break; case DEVLINK_PORT_FLAVOUR_PCI_VF: - n = snprintf(name, len, "pf%uvf%u", - attrs->pf_number, attrs->pci.vf_number); + if (!attrs->pci.multiport) + n = snprintf(name, len, "pf%uvf%u", + attrs->pci.pf_number, + attrs->pci.vf_number); + else + n = snprintf(name, len, "pf%uvf%us%u", + attrs->pci.pf_number, + attrs->pci.vf_number, + attrs->pci.subport_number); break; } -- 2.19.2