From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_MUTT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FC38C43219 for ; Mon, 29 Apr 2019 13:23:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3DA1020652 for ; Mon, 29 Apr 2019 13:23:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="UJxTcsu3" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728227AbfD2NXi (ORCPT ); Mon, 29 Apr 2019 09:23:38 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:48548 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725838AbfD2NXg (ORCPT ); Mon, 29 Apr 2019 09:23:36 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=G9+UVkmUelZPc/fq6yyI9wbOx04gDxUNqmqWJk98Nkg=; b=UJxTcsu3QVfNUjU0YZtQzi6U3y wqS5EGC5LSO/GkxW9xCydVDvbZ1fs37BBldYsyRB4/OLeWLrobP38ZeMf/gS1JrYsru+wKb40eq3m ceOmhYYufSpplKctvC8LKsMTHYMWy3AnrSfh9BAbBMXdDsP07MKex5LVfvQ4FhluvDmg=; Received: from andrew by vps0.lunn.ch with local (Exim 4.89) (envelope-from ) id 1hL6Fj-00010z-OB; Mon, 29 Apr 2019 15:23:27 +0200 Date: Mon, 29 Apr 2019 15:23:27 +0200 From: Andrew Lunn To: biao huang Cc: Jose Abreu , davem@davemloft.net, Giuseppe Cavallaro , Alexandre Torgue , Maxime Coquelin , Matthias Brugger , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, yt.shen@mediatek.com, jianguo.zhang@mediatek.com Subject: Re: [PATCH 5/6] net: stmmac: add mdio clause 45 access from mac device for dwmac4 Message-ID: <20190429132327.GF10772@lunn.ch> References: <1556433009-25759-1-git-send-email-biao.huang@mediatek.com> <1556433009-25759-6-git-send-email-biao.huang@mediatek.com> <20190428163705.GH23059@lunn.ch> <1556517925.24897.17.camel@mhfsdcap03> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1556517925.24897.17.camel@mhfsdcap03> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org > > Hi Biao > > > > readl_poll_timeout() returns an error code. It is better to return > > that, than make up some other error code. Yes, i know the C22 read > > returns EBUSY, but we don't need to copy that behaviour into C45. > > > OK, will return error code here. > > > + > > > + value = 0; > > > + value |= (prtad << priv->hw->mii.cl45_reg_shift) > > > + & priv->hw->mii.cl45_reg_mask; > > > + writel(value, priv->ioaddr + mii_data); > > > + > > > + /* delay 2ms to avoid error value of get_phy_c45_devs_in_pkg */ > > > + mdelay(2); > > > > Please could you explain this a bit more? > when of_mdiobus_register is invoked, > the C22 PHY addr information will be obtained in device tree(reg = xx, > no need through mdiobus), > but C45 PHY addr should be got through mdiobus->read according to > current flow. > of_mdiobus_register --> > of_mdiobus_register_phy --> > get_phy_device --> > get_phy_id --> > get_phy_c45_ids --> > get_phy_c45_devs_in_pkg > > In my platform, mdio bus read will return 0xffff or 0x0000 for C45 in > of_mdiobus_register callstack, and that's not the expected value. > So that the mdiobus register fails. > > We took some time to find that only after adding 2ms delay here, > the read action will be stable and return the expected value. > > did you try C45 support in your platform? I can't tell whether it's a > common or specified issue. It sounds like you need to put a logic analyser on the bus and see if it performs a C22 transaction, or an invalid transaction, without the 2ms pause. This sounds like a 'silicon' bug. There should not be a need to pause here. And the comment should talk about this silicon bug, not get_phy_c45_devs_in_pkg(). It will fail for all accesses, not just those for get_phy_c45_devs_in_pkg(). Andrew