Re: [PATCH V2] net: phy: tja11xx: Add IRQ support to the driver

[Andrew Lunn <andrew@lunn.ch>]

On Tue, May 28, 2019 at 09:46:47PM +0200, Marek Vasut wrote:
> On 5/28/19 9:35 PM, Heiner Kallweit wrote:
> > On 28.05.2019 21:31, Marek Vasut wrote:
> >> On 5/28/19 9:28 PM, Heiner Kallweit wrote:
> >>> On 28.05.2019 21:23, Marek Vasut wrote:
> >>>> Add support for handling the TJA11xx PHY IRQ signal.
> >>>>
> >>>> Signed-off-by: Marek Vasut <marex@denx.de>
> >>>> Cc: Andrew Lunn <andrew@lunn.ch>
> >>>> Cc: Florian Fainelli <f.fainelli@gmail.com>
> >>>> Cc: Guenter Roeck <linux@roeck-us.net>
> >>>> Cc: Heiner Kallweit <hkallweit1@gmail.com>
> >>>> Cc: Jean Delvare <jdelvare@suse.com>
> >>>> Cc: linux-hwmon@vger.kernel.org
> >>>> ---
> >>>> V2: - Define each bit of the MII_INTEN register and a mask
> >>>>     - Drop IRQ acking from tja11xx_config_intr()
> >>>> ---
> >>>>  drivers/net/phy/nxp-tja11xx.c | 48 +++++++++++++++++++++++++++++++++++
> >>>>  1 file changed, 48 insertions(+)
> >>>>
> >>>> diff --git a/drivers/net/phy/nxp-tja11xx.c b/drivers/net/phy/nxp-tja11xx.c
> >>>> index b705d0bd798b..b41af609607d 100644
> >>>> --- a/drivers/net/phy/nxp-tja11xx.c
> >>>> +++ b/drivers/net/phy/nxp-tja11xx.c
 > >>>> @@ -40,6 +40,29 @@
> >>>>  #define MII_INTSRC_TEMP_ERR		BIT(1)
> >>>>  #define MII_INTSRC_UV_ERR		BIT(3)
> >>>>  
> >>>> +#define MII_INTEN			22
> >>>> +#define MII_INTEN_PWON_EN		BIT(15)
> >>>> +#define MII_INTEN_WAKEUP_EN		BIT(14)
> >>>> +#define MII_INTEN_PHY_INIT_FAIL_EN	BIT(11)
> >>>> +#define MII_INTEN_LINK_STATUS_FAIL_EN	BIT(10)
> >>>> +#define MII_INTEN_LINK_STATUS_UP_EN	BIT(9)
> >>>> +#define MII_INTEN_SYM_ERR_EN		BIT(8)
> >>>> +#define MII_INTEN_TRAINING_FAILED_EN	BIT(7)
> >>>> +#define MII_INTEN_SQI_WARNING_EN	BIT(6)
> >>>> +#define MII_INTEN_CONTROL_ERR_EN	BIT(5)
> >>>> +#define MII_INTEN_UV_ERR_EN		BIT(3)
> >>>> +#define MII_INTEN_UV_RECOVERY_EN	BIT(2)
> >>>> +#define MII_INTEN_TEMP_ERR_EN		BIT(1)
> >>>> +#define MII_INTEN_SLEEP_ABORT_EN	BIT(0)
> >>>> +#define MII_INTEN_MASK							\
> >>>> +	(MII_INTEN_PWON_EN | MII_INTEN_WAKEUP_EN |			\
> >>>> +	MII_INTEN_PHY_INIT_FAIL_EN | MII_INTEN_LINK_STATUS_FAIL_EN |	\
> >>>> +	MII_INTEN_LINK_STATUS_UP_EN | MII_INTEN_SYM_ERR_EN |		\
> >>>> +	MII_INTEN_TRAINING_FAILED_EN | MII_INTEN_SQI_WARNING_EN |	\
> >>>> +	MII_INTEN_CONTROL_ERR_EN | MII_INTEN_UV_ERR_EN |		\
> >>>> +	MII_INTEN_UV_RECOVERY_EN | MII_INTEN_TEMP_ERR_EN |		\
> >>>> +	MII_INTEN_SLEEP_ABORT_EN)
> >>>
> >>> Why do you enable all these interrupt sources? As I said, phylib needs
> >>> link change info only.
> >>
> >> Because I need them to reliably detect that the link state changed.

Hi Marek

That statement suggests you started with just bits 10 and 9 and it
failed to detect some sort of link up/down event? What was missed?

       Andrew