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[73.222.71.142]) by smtp.gmail.com with ESMTPSA id 127sm6313018pfc.159.2019.05.31.07.08.42 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 31 May 2019 07:08:43 -0700 (PDT) Date: Fri, 31 May 2019 07:08:41 -0700 From: Richard Cochran To: Vladimir Oltean Cc: Florian Fainelli , Vivien Didelot , Andrew Lunn , "David S. Miller" , John Stultz , Thomas Gleixner , Stephen Boyd , lkml , netdev Subject: Re: [PATCH net-next 0/5] PTP support for the SJA1105 DSA driver Message-ID: <20190531140841.j4f72rlojmaayqr5@localhost> References: <20190529045207.fzvhuu6d6jf5p65t@localhost> <20190530034555.wv35efen3igwwzjq@localhost> <20190530143037.iky5kk3h4ssmec3f@localhost> <20190530150557.iur7fruhyf5bs3qw@localhost> <20190531043417.6phscbpmo6krvxam@localhost> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20170113 (1.7.2) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Fri, May 31, 2019 at 04:23:24PM +0300, Vladimir Oltean wrote: > The switch has internal logic to not send any other frame to the CPU > between a link-local and a meta frame. So this is guarantied by the switch? What happens when multiple PTP frames arrive at the same time on different ports? Does the switch buffer them and ensure strict ordering at the CPU port? In any case, the switch's guarantee is an important fact to state clearly in your series! > Hence, if the MAC of the DSA master drops some of these frames, it > does not "spoil any chance" except if, out of the sequence LL n -> > META n -> LL n+1 -> META n+1, it persistently drops only META n and LL > n+1. LL = link layer? > So I'd like to re-state the problem towards what should be done to > prevent LL and META frames getting reordered in the DSA master driver > on multi-queue/multi-core systems. Ok. > At the most basic level, there > should exist a rule that makes only a single core process these > frames. This can be done simply using a data structure in the driver with an appropriate locking mechanism. Then you don't have to worry which core the driver code runs on. Thanks, Richard