From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.6 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3A56FC0650E for ; Wed, 3 Jul 2019 20:43:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1461121882 for ; Wed, 3 Jul 2019 20:43:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="NqpSXt2a" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727260AbfGCUnF (ORCPT ); Wed, 3 Jul 2019 16:43:05 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:35467 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726821AbfGCUnF (ORCPT ); Wed, 3 Jul 2019 16:43:05 -0400 Received: by mail-pl1-f195.google.com with SMTP id w24so1852723plp.2 for ; Wed, 03 Jul 2019 13:43:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=x4TV9OuGMH2IFAWRzYFxjVpyDgSmZpX4HKATzy9i5LE=; b=NqpSXt2ai4FWgYUhx9YUIQd8vWtb3B9ByuyfiMWY/XFkaiWfCj1FBGxkAwtk1xNHNN vgKEuCm1NC9cInuq+hL1kwDFHAL7pRfhG61zNFwnu36Z3oVL48mwQVXET+K0XU4M/2U4 MxeCSPy7BE3iLKqtqYOwH2ulvCTGQgY8QrwSQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=x4TV9OuGMH2IFAWRzYFxjVpyDgSmZpX4HKATzy9i5LE=; b=Kkf0k6bPYO8NiXk83o+8AsnLx02ZK0jhZXg3JUauJXsP8LASvyPFGLDaqOkIx0vxq5 dlf1kZ+UOFXI2zmTJGXbCCoj2a5LmruWbd7iJh/TsALyO/uM1fJbAi8NYdQ+90ym7Fyn pC5eqWfvPv1lLRgQtb7NmSa33zxBzHCpI8OvPRwTPD6EtENwGfIuMiQufMhHqk5ZIl6+ Zh1bsnlUpzPjFy4Fqg7evN2V4ZksOYUHvNeHMGjDXDVm4zkJ1Dh6bSTJrixy2b2uyJG2 tVTjqiBIgMLodJ6TX14Sb3ejNRt5bPZ7HUISyEk5XiKwcUVS2tVggvGAQOJiEhq/7hU3 zX8g== X-Gm-Message-State: APjAAAWxKTgYMARE8BaYLkU1T3BgE+dmHnxB5i5U8gijv6DhosE8AMn9 jinfiRpzO/Z++kpBAMmQdP8KPw== X-Google-Smtp-Source: APXvYqykgvMApITkPMMhHzregOurly8+6C4wq2UcUc1VFL1/AiRc7obmDF5E4wOp3JP2p5uh8rmkmw== X-Received: by 2002:a17:902:9a06:: with SMTP id v6mr43660872plp.71.1562186584828; Wed, 03 Jul 2019 13:43:04 -0700 (PDT) Received: from localhost ([2620:15c:202:1:75a:3f6e:21d:9374]) by smtp.gmail.com with ESMTPSA id u7sm3086441pgr.94.2019.07.03.13.43.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 03 Jul 2019 13:43:04 -0700 (PDT) Date: Wed, 3 Jul 2019 13:43:02 -0700 From: Matthias Kaehlcke To: Andrew Lunn Cc: "David S . Miller" , Rob Herring , Mark Rutland , Florian Fainelli , Heiner Kallweit , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Douglas Anderson Subject: Re: [PATCH v2 7/7] net: phy: realtek: configure RTL8211E LEDs Message-ID: <20190703204302.GG250418@google.com> References: <20190703193724.246854-1-mka@chromium.org> <20190703193724.246854-7-mka@chromium.org> <20190703201032.GG18473@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20190703201032.GG18473@lunn.ch> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Wed, Jul 03, 2019 at 10:10:32PM +0200, Andrew Lunn wrote: > > + for (i = 0; i < count; i++) { > > + u32 val; > > + > > + of_property_read_u32_index(dev->of_node, > > + "realtek,led-modes", i, &val); > > Please validate the value, 0 - 7. ok, will be 0-7 and 0x10000 - 0x10007 (w/ RTL8211E_LINK_ACTIVITY) though. This is the somewhat quirky part about the property, each value translates to two registers. This seemed to be the cleanest solution from the bindings perspective, but I'm open to other suggestions.