From: Leon Romanovsky <leon@kernel.org>
To: Saeed Mahameed <saeedm@dev.mellanox.co.il>
Cc: Saeed Mahameed <saeedm@mellanox.com>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"linux-rdma@vger.kernel.org" <linux-rdma@vger.kernel.org>,
Eran Ben Elisha <eranbe@mellanox.com>,
Tariq Toukan <tariqt@mellanox.com>
Subject: Re: [PATCH mlx5-next 4/5] net/mlx5: Introduce TLS TX offload hardware bits and structures
Date: Thu, 4 Jul 2019 21:21:13 +0300 [thread overview]
Message-ID: <20190704182113.GG7212@mtr-leonro.mtl.com> (raw)
In-Reply-To: <CALzJLG--k3z2HuV09tivJuOtU-BFAyCEV1vJbPqYX+OyskggmQ@mail.gmail.com>
On Thu, Jul 04, 2019 at 01:21:04PM -0400, Saeed Mahameed wrote:
> On Thu, Jul 4, 2019 at 1:15 PM Leon Romanovsky <leon@kernel.org> wrote:
> >
> > On Thu, Jul 04, 2019 at 01:06:58PM -0400, Saeed Mahameed wrote:
> > > On Wed, Jul 3, 2019 at 5:27 AM <leon@kernel.org> wrote:
> > > >
> > > > On Wed, Jul 03, 2019 at 07:39:32AM +0000, Saeed Mahameed wrote:
> > > > > From: Eran Ben Elisha <eranbe@mellanox.com>
> > > > >
> > > > > Add TLS offload related IFC structs, layouts and enumerations.
> > > > >
> > > > > Signed-off-by: Eran Ben Elisha <eranbe@mellanox.com>
> > > > > Signed-off-by: Tariq Toukan <tariqt@mellanox.com>
> > > > > Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
> > > > > ---
> > > > > include/linux/mlx5/device.h | 14 +++++
> > > > > include/linux/mlx5/mlx5_ifc.h | 104 ++++++++++++++++++++++++++++++++--
> > > > > 2 files changed, 114 insertions(+), 4 deletions(-)
> > > >
> > > > <...>
> > > >
> > > > > @@ -2725,7 +2739,8 @@ struct mlx5_ifc_traffic_counter_bits {
> > > > >
> > > > > struct mlx5_ifc_tisc_bits {
> > > > > u8 strict_lag_tx_port_affinity[0x1];
> > > > > - u8 reserved_at_1[0x3];
> > > > > + u8 tls_en[0x1];
> > > > > + u8 reserved_at_1[0x2];
> > > >
> > > > It should be reserved_at_2.
> > > >
> > >
> > > it should be at_1.
> >
> > Why? See mlx5_ifc_flow_table_prop_layout_bits, mlx5_ifc_roce_cap_bits, e.t.c.
> >
>
> they are all at_1 .. so i don't really understand what you want from me,
> Leon the code is good, please double check you comments..
Saeed,
reserved_at_1 should be renamed to be reserved_at_2.
strict_lag_tx_port_affinity[0x1] + tls_en[0x1] = 0x2
>
> > Thanks
> >
> > >
> > > > Thanks
next prev parent reply other threads:[~2019-07-04 18:21 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-03 7:39 [PATCH mlx5-next 0/5] Mellanox, mlx5 low level updates 2019-07-02 Saeed Mahameed
2019-07-03 7:39 ` [PATCH mlx5-next 1/5] net/mlx5: Introduce and use mlx5_eswitch_get_total_vports() Saeed Mahameed
2019-07-03 7:39 ` [PATCH mlx5-next 2/5] net/mlx5: E-Switch prepare functions change handler to be modular Saeed Mahameed
2019-07-03 7:39 ` [PATCH mlx5-next 3/5] net/mlx5: Refactor mlx5_esw_query_functions for modularity Saeed Mahameed
2019-07-03 7:39 ` [PATCH mlx5-next 4/5] net/mlx5: Introduce TLS TX offload hardware bits and structures Saeed Mahameed
2019-07-03 9:27 ` leon
2019-07-04 17:06 ` Saeed Mahameed
2019-07-04 17:15 ` Leon Romanovsky
2019-07-04 17:21 ` Saeed Mahameed
2019-07-04 18:21 ` Leon Romanovsky [this message]
2019-07-09 20:54 ` Saeed Mahameed
2019-07-10 5:27 ` Leon Romanovsky
2019-07-03 7:39 ` [PATCH mlx5-next 5/5] net/mlx5: Properly name the generic WQE control field Saeed Mahameed
2019-07-04 17:10 ` [PATCH mlx5-next 0/5] Mellanox, mlx5 low level updates 2019-07-02 Saeed Mahameed
2019-07-04 17:16 ` Leon Romanovsky
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