From: Andrew Lunn <andrew@lunn.ch>
To: Antoine Tenart <antoine.tenart@bootlin.com>
Cc: davem@davemloft.net, richardcochran@gmail.com,
alexandre.belloni@bootlin.com, UNGLinuxDriver@microchip.com,
netdev@vger.kernel.org, thomas.petazzoni@bootlin.com,
allan.nielsen@microchip.com
Subject: Re: [PATCH net-next v5 1/6] Documentation/bindings: net: ocelot: document the PTP bank
Date: Sat, 10 Aug 2019 19:14:13 +0200 [thread overview]
Message-ID: <20190810171413.GE30120@lunn.ch> (raw)
In-Reply-To: <20190807092214.19936-2-antoine.tenart@bootlin.com>
On Wed, Aug 07, 2019 at 11:22:09AM +0200, Antoine Tenart wrote:
> One additional register range needs to be described within the Ocelot
> device tree node: the PTP. This patch documents the binding needed to do
> so.
>
> Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
next prev parent reply other threads:[~2019-08-10 17:14 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-08-07 9:22 [PATCH net-next v5 0/6] net: mscc: PTP Hardware Clock (PHC) support Antoine Tenart
2019-08-07 9:22 ` [PATCH net-next v5 1/6] Documentation/bindings: net: ocelot: document the PTP bank Antoine Tenart
2019-08-10 17:14 ` Andrew Lunn [this message]
2019-08-07 9:22 ` [PATCH net-next v5 2/6] Documentation/bindings: net: ocelot: document the PTP ready IRQ Antoine Tenart
2019-08-10 17:15 ` Andrew Lunn
2019-08-07 9:22 ` [PATCH net-next v5 3/6] net: mscc: describe the PTP register range Antoine Tenart
2019-08-10 17:16 ` Andrew Lunn
2019-08-07 9:22 ` [PATCH net-next v5 4/6] net: mscc: improve the frame header parsing readability Antoine Tenart
2019-08-07 9:22 ` [PATCH net-next v5 5/6] net: mscc: remove the frame_info cpuq member Antoine Tenart
2019-08-10 17:18 ` Andrew Lunn
2019-08-07 9:22 ` [PATCH net-next v5 6/6] net: mscc: PTP Hardware Clock (PHC) support Antoine Tenart
2019-08-10 17:32 ` Andrew Lunn
2019-08-12 8:49 ` Antoine Tenart
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