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[73.222.71.142]) by smtp.gmail.com with ESMTPSA id e9sm26328184pge.39.2019.08.22.07.16.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 Aug 2019 07:16:43 -0700 (PDT) Date: Thu, 22 Aug 2019 07:16:41 -0700 From: Richard Cochran To: Vladimir Oltean Cc: Mark Brown , Hubert Feurstein , Miroslav Lichvar , Andrew Lunn , Florian Fainelli , linux-spi@vger.kernel.org, netdev Subject: Re: [PATCH spi for-5.4 0/5] Deterministic SPI latency with NXP DSPI driver Message-ID: <20190822141641.GB1437@localhost> References: <20190818182600.3047-1-olteanv@gmail.com> <20190821043845.GB1332@localhost> <20190821140815.GA1447@localhost> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Wed, Aug 21, 2019 at 11:17:23PM +0300, Vladimir Oltean wrote: > Of course PPS with a dedicated hardware receiver that can take input > compare timestamps is always preferable. However non-Ethernet > synchronization in the field looks to me like "make do with whatever > you can". I'm not sure a plain GPIO that raises an interrupt is better > than an interrupt-driven serial protocol controller - it's (mostly) > the interrupts that throw off the precision of the software timestamp. > And use Miroslav's pps-gpio-poll module and you're back from where you > started (try to make a sw timestamp as precise as possible). Right, it might be better, might not. You can consider hacking a local time stamp into the ISR. Also, if one of your MACs has a input event pin, you can feed the switch's PPS output in there. > wouldn't be my first choice. But DSA could have that built-in, and > with the added latency benefit of a MAC-to-MAC connection. > Too bad the mv88e6xxx driver can't do loopback timestamping, that's > already 50% of the DSA drivers that support PTP at all. An embedded > solution for this is less compelling now. Let me back track on my statement about mv88e6xxx. At the time, I didn't see any practical way to use the CPU port for synchronization, but I forget exactly the details. Maybe it is indeed possible, somehow. If you can find a way that will work on your switch and on the Marvell, then I'd like to hear about it. Thinking back... One problem is this. PTP requires a delay measurement. You can send a delay request from the host, but there will never be a reply. Another problem is this. A Sync message arriving on an external port is time stamped there, but then it is encapsulated as a tagged DSA management message and delivered out the CPU port. At this point, it is no longer a PTP frame and will not be time stamped at the CPU port on egress. Thanks, Richard