From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83D90C3A5A1 for ; Wed, 28 Aug 2019 20:06:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 59F3520828 for ; Wed, 28 Aug 2019 20:06:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726851AbfH1UGZ (ORCPT ); Wed, 28 Aug 2019 16:06:25 -0400 Received: from shards.monkeyblade.net ([23.128.96.9]:36142 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726400AbfH1UGZ (ORCPT ); Wed, 28 Aug 2019 16:06:25 -0400 Received: from localhost (unknown [IPv6:2601:601:9f80:35cd::d71]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) (Authenticated sender: davem-davemloft) by shards.monkeyblade.net (Postfix) with ESMTPSA id 819861534DC58; Wed, 28 Aug 2019 13:06:24 -0700 (PDT) Date: Wed, 28 Aug 2019 13:06:24 -0700 (PDT) Message-Id: <20190828.130624.876004452510316906.davem@davemloft.net> To: andrew@lunn.ch Cc: ruxandra.radulescu@nxp.com, netdev@vger.kernel.org, ioana.ciornei@nxp.com Subject: Re: [PATCH net-next v2 3/3] dpaa2-eth: Add pause frame support From: David Miller In-Reply-To: <20190828115250.GA32178@lunn.ch> References: <20190827232132.GD26248@lunn.ch> <20190828115250.GA32178@lunn.ch> X-Mailer: Mew version 6.8 on Emacs 26.1 Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.5.12 (shards.monkeyblade.net [149.20.54.216]); Wed, 28 Aug 2019 13:06:24 -0700 (PDT) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Andrew Lunn Date: Wed, 28 Aug 2019 13:52:50 +0200 >> Clearing the ASYM_PAUSE flag only means we tell the firmware we want >> both Rx and Tx pause to be enabled in the beginning. User can still set >> an asymmetric config (i.e. only Rx pause or only Tx pause to be enabled) >> if needed. >> >> The truth table is like this: >> >> PAUSE | ASYM_PAUSE | Rx pause | Tx pause >> ---------------------------------------- >> 0 | 0 | disabled | disabled >> 0 | 1 | disabled | enabled >> 1 | 0 | enabled | enabled >> 1 | 1 | enabled | disabled > > Hi Ioana > > Ah, that is not intuitive. Please add a comment, and maybe this table > to the commit message. Isn't this the same truth table as for the pause bits in the usual MII registers?