From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 976E8C49ED7 for ; Fri, 20 Sep 2019 05:39:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 697B0207FC for ; Fri, 20 Sep 2019 05:39:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="02KlcMbN" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2408164AbfITFjQ (ORCPT ); Fri, 20 Sep 2019 01:39:16 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:39165 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2392357AbfITFjF (ORCPT ); Fri, 20 Sep 2019 01:39:05 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x8K5aIrq007204; Fri, 20 Sep 2019 07:38:44 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=VnwKf11mud+V9UqPPhhSTSIs+BHjWsojy/CZj/RvsVU=; b=02KlcMbNxbjCzkFf/cfQt8m7lljQTG7nRXqrRPS0pd1zsWDpxMc3yklqPakKf3v90ciP JzRBChLvz4iwlQh5NbK/MZXi+49MfXnZiwibFsFlB1sFF+zDqz1lIVv9wPk3d9Ipd6U0 mprZfN+69V0yVqcwzyOKEUqMOpO5BV/ZREhsw3/FskpOnWOEqjLBxEObmMdQ/QEv40t5 J3cm8dZqmXfexS4CWKz37t1ft/+hsjML4Q/RsA8PIjKIM611PzGZ5fvo7CKjT0F626Io W+vQag05KxBdeh/M2zsHRVH5TPjaD8vB9M40WjDpp8haKdSbMAGeudMjPMVNdEYnp/Oo 3Q== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com with ESMTP id 2v3va2gk4a-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 20 Sep 2019 07:38:44 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 3260E4B; Fri, 20 Sep 2019 05:38:39 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas22.st.com [10.75.90.92]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id DF55E2209BE; Fri, 20 Sep 2019 07:38:38 +0200 (CEST) Received: from SAFEX1HUBCAS24.st.com (10.75.90.95) by Safex1hubcas22.st.com (10.75.90.92) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 20 Sep 2019 07:38:38 +0200 Received: from localhost (10.201.22.222) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Fri, 20 Sep 2019 07:38:38 +0200 From: Christophe Roullier To: , , , , , , CC: , , , , , , Subject: [PATCH 4/5] ARM: dts: stm32: adjust slew rate for Ethernet Date: Fri, 20 Sep 2019 07:38:16 +0200 Message-ID: <20190920053817.13754-5-christophe.roullier@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190920053817.13754-1-christophe.roullier@st.com> References: <20190920053817.13754-1-christophe.roullier@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.201.22.222] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.70,1.0.8 definitions=2019-09-20_01:2019-09-19,2019-09-20 signatures=0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org ETH_MDIO slew-rate should be set to "0" instead of "2" Signed-off-by: Christophe Roullier --- arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi index df6470133574..7667fe758957 100644 --- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi +++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi @@ -239,13 +239,18 @@ , /* ETH_RGMII_TXD2 */ , /* ETH_RGMII_TXD3 */ , /* ETH_RGMII_TX_CTL */ - , /* ETH_MDIO */ ; /* ETH_MDC */ bias-disable; drive-push-pull; - slew-rate = <3>; + slew-rate = <2>; }; pins2 { + pinmux = ; /* ETH_MDIO */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { pinmux = , /* ETH_RGMII_RXD0 */ , /* ETH_RGMII_RXD1 */ , /* ETH_RGMII_RXD2 */ -- 2.17.1