From: David Miller <davem@davemloft.net>
To: marex@denx.de
Cc: netdev@vger.kernel.org, andrew@lunn.ch, f.fainelli@gmail.com,
george.mccollister@gmail.com, Tristram.Ha@microchip.com,
vivien.didelot@savoirfairelinux.com, woojung.huh@microchip.com
Subject: Re: [PATCH V2] net: dsa: microchip: Always set regmap stride to 1
Date: Fri, 27 Sep 2019 20:21:34 +0200 (CEST) [thread overview]
Message-ID: <20190927.202134.199674863087018843.davem@davemloft.net> (raw)
In-Reply-To: <20190925220842.4301-1-marex@denx.de>
From: Marek Vasut <marex@denx.de>
Date: Thu, 26 Sep 2019 00:08:42 +0200
> The regmap stride is set to 1 for regmap describing 8bit registers already.
> However, for 16/32/64bit registers, the stride is 2/4/8 respectively. This
> is not correct, as the switch protocol supports unaligned register reads
> and writes and the KSZ87xx even uses such unaligned register accesses to
> read e.g. MIB counter.
>
> This patch fixes MIB counter access on KSZ87xx.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Fixes: 46558d601cb6 ("net: dsa: microchip: Initial SPI regmap support")
> Fixes: 255b59ad0db2 ("net: dsa: microchip: Factor out regmap config generation into common header")
Applied.
prev parent reply other threads:[~2019-09-27 18:21 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-25 22:08 [PATCH V2] net: dsa: microchip: Always set regmap stride to 1 Marek Vasut
2019-09-26 13:52 ` George McCollister
2019-09-28 1:56 ` Marek Vasut
2019-09-27 18:21 ` David Miller [this message]
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