From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.1 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE25FC352AA for ; Tue, 1 Oct 2019 16:52:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9A4AC2168B for ; Tue, 1 Oct 2019 16:52:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="ZaDS95R+" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389386AbfJAQw5 (ORCPT ); Tue, 1 Oct 2019 12:52:57 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:56510 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389331AbfJAQw4 (ORCPT ); Tue, 1 Oct 2019 12:52:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=FX5jf20eacmB/0gFXEhbZpatqYKCnwg235wY4yTy5I8=; b=ZaDS95R+qKbRGCSKbOtuDkKVkt /C/hkhascHZ5lWv9IFuRxtzt2/pOybQ0vbmd7SmvBukkhoPdpz691km29114XSaqO9j/geTyTDrqU 2RjCogdwSyQJEKXMJsarWOGVkqEDvUu6l3PoKFZzHIaFAzrFPMgAJmAgkQmCeG60SaJg=; Received: from andrew by vps0.lunn.ch with local (Exim 4.92.2) (envelope-from ) id 1iFLOJ-0001ii-4j; Tue, 01 Oct 2019 18:52:47 +0200 Date: Tue, 1 Oct 2019 18:52:47 +0200 From: Andrew Lunn To: Florian Fainelli Cc: Icenowy Zheng , "David S . Miller" , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Heiner Kallweit , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com Subject: Re: [PATCH 0/3] Pine64+ specific hacks for RTL8211E Ethernet PHY Message-ID: <20191001165247.GE2031@lunn.ch> References: <20191001082912.12905-1-icenowy@aosc.io> <3ef60a0c-5cfd-420b-6cad-2c16eb2a6c01@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3ef60a0c-5cfd-420b-6cad-2c16eb2a6c01@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Tue, Oct 01, 2019 at 09:47:08AM -0700, Florian Fainelli wrote: > On 10/1/19 1:29 AM, Icenowy Zheng wrote: > > There're some Pine64+ boards known to have broken RTL8211E chips, and > > a hack is given by Pine64+, which is said to be from Realtek. > > > > This patchset adds the hack. > > > > The hack is taken from U-Boot, and it contains magic numbers without > > any document. > > Such hacks are the very reason why PHY fixups exists, please investigate > working with Realtek first to understand how to make this hack less of a > hack so it is understood what it does and you can either add proper > infrastructure to the realtek PHY driver to perform that hack, or if > that is not an option, register a board specific fixup. Hi Icenowy It would also be nice to know if only Pine64 has these bad PHYs, or if they were in the general distribution chain and other boards might have them as well. Andrew