[PATCH net-next 0/2] PTP clock source for SJA1105 tc-taprio offload

[Vladimir Oltean <olteanv@gmail.com>]

This series makes the IEEE 802.1Qbv egress scheduler of the sja1105
switch use a time reference that is synchronized to the network. This
enables quite a few real Time Sensitive Networking use cases, since in
this mode the switch can offer its clients a TDMA sort of access to the
network, and guaranteed latency for frames that are properly scheduled
based on the common PTP time.

The driver needs to do a 2-part activity:
- Program the gate control list into the static config and upload it
  over SPI to the switch (already supported)
- Write the activation time of the scheduler (base-time) into the
  PTPSCHTM register, and set the PTPSTRTSCH bit.
- Monitor the activation of the scheduler at the planned time and its
  health.

Ok, 3 parts.

The time-aware scheduler cannot be programmed to activate at a time in
the past, and there is some logic to avoid that.

PTPCLKCORP is one of those "black magic" registers that just need to be
written to the length of the cycle. There is a 40-line long comment in
the second patch which explains why.

Vladimir Oltean (2):
  net: dsa: sja1105: Make the PTP command read-write
  net: dsa: sja1105: Implement state machine for TAS with PTP clock
    source

 drivers/net/dsa/sja1105/Kconfig       |   1 +
 drivers/net/dsa/sja1105/sja1105.h     |  16 +-
 drivers/net/dsa/sja1105/sja1105_ptp.c |  77 +++--
 drivers/net/dsa/sja1105/sja1105_ptp.h |  24 +-
 drivers/net/dsa/sja1105/sja1105_spi.c |  16 +-
 drivers/net/dsa/sja1105/sja1105_tas.c | 428 +++++++++++++++++++++++++-
 drivers/net/dsa/sja1105/sja1105_tas.h |  27 ++
 7 files changed, 534 insertions(+), 55 deletions(-)

-- 
2.17.1