From: Andrew Lunn <andrew@lunn.ch>
To: Baruch Siach <baruch@tkos.co.il>
Cc: Marek Behun <marek.behun@nic.cz>,
Vivien Didelot <vivien.didelot@gmail.com>,
netdev@vger.kernel.org,
Denis Odintsov <d.odintsov@traviangames.com>,
Hubert Feurstein <h.feurstein@gmail.com>
Subject: Re: [BUG] mv88e6xxx: tx regression in v5.3
Date: Thu, 12 Dec 2019 20:31:29 +0100 [thread overview]
Message-ID: <20191212193129.GF30053@lunn.ch> (raw)
In-Reply-To: <20191212190640.6vki2pjfacdnxihh@sapphire.tkos.co.il>
> diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> index bd881497b872..8f61cae9d3b0 100644
> --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> @@ -408,6 +408,11 @@ port@5 {
> reg = <5>;
> label = "cpu";
> ethernet = <&cp1_eth2>;
> +
> + fixed-link {
> + speed = <2500>;
> + full-duplex;
> + };
> };
> };
The DSA driver is expected to configure the CPU port at its maximum
speed. You should only add a fixed link if you need to slow it down.
I expect 2500 is the maximum speed of this port.
Andrew
next prev parent reply other threads:[~2019-12-12 19:31 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-11 9:48 [BUG] mv88e6xxx: tx regression in v5.3 Baruch Siach
2019-12-11 13:11 ` Andrew Lunn
2019-12-11 17:07 ` Baruch Siach
2019-12-11 17:49 ` Andrew Lunn
2019-12-12 8:50 ` Baruch Siach
2019-12-12 13:14 ` Andrew Lunn
2019-12-12 14:19 ` Andreas Tobler
2019-12-12 15:08 ` Baruch Siach
2019-12-12 15:13 ` Andrew Lunn
2019-12-12 15:23 ` Baruch Siach
2019-12-12 18:17 ` Baruch Siach
2019-12-12 18:32 ` Marek Behun
2019-12-12 18:48 ` Baruch Siach
2019-12-12 18:36 ` Marek Behun
2019-12-12 19:06 ` Baruch Siach
2019-12-12 19:31 ` Andrew Lunn [this message]
2019-12-12 19:41 ` Marek Behun
2019-12-12 20:49 ` Andrew Lunn
2019-12-15 10:13 ` Baruch Siach
2019-12-15 11:10 ` Baruch Siach
2019-12-15 14:53 ` Andrew Lunn
2019-12-15 15:08 ` Baruch Siach
2019-12-15 16:14 ` Andrew Lunn
2019-12-17 18:26 ` Baruch Siach
2019-12-18 14:30 ` Marek Behún
2019-12-18 16:04 ` Baruch Siach
2019-12-19 9:04 ` Baruch Siach
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