From: Andrew Lunn <andrew@lunn.ch>
To: Baruch Siach <baruch@tkos.co.il>
Cc: Marek Behun <marek.behun@nic.cz>,
Vivien Didelot <vivien.didelot@gmail.com>,
netdev@vger.kernel.org,
Denis Odintsov <d.odintsov@traviangames.com>,
Hubert Feurstein <h.feurstein@gmail.com>
Subject: Re: [BUG] mv88e6xxx: tx regression in v5.3
Date: Sun, 15 Dec 2019 15:53:49 +0100 [thread overview]
Message-ID: <20191215145349.GB22725@lunn.ch> (raw)
In-Reply-To: <871rt5u9no.fsf@tarshish>
> This fixes cpu port configuration for me:
>
> diff --git a/drivers/net/dsa/mv88e6xxx/port.c b/drivers/net/dsa/mv88e6xxx/port.c
> index 7fe256c5739d..a6c320978bcf 100644
> --- a/drivers/net/dsa/mv88e6xxx/port.c
> +++ b/drivers/net/dsa/mv88e6xxx/port.c
> @@ -427,10 +427,6 @@ static int mv88e6xxx_port_set_cmode(struct mv88e6xxx_chip *chip, int port,
> cmode = 0;
> }
>
> - /* cmode doesn't change, nothing to do for us */
> - if (cmode == chip->ports[port].cmode)
> - return 0;
> -
> lane = mv88e6xxx_serdes_get_lane(chip, port);
> if (lane) {
> if (chip->ports[port].serdes_irq) {
>
> Does that make sense?
This needs testing on a 6390, with a port 9 or 10 using fixed link. We
have had issues in the past where mac_config() has been called once
per second, and each time it reconfigured the MAC, causing the link to
go down/up. So we try to avoid doing work which is not requires and
which could upset the link.
Andrew
next prev parent reply other threads:[~2019-12-15 14:53 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-11 9:48 [BUG] mv88e6xxx: tx regression in v5.3 Baruch Siach
2019-12-11 13:11 ` Andrew Lunn
2019-12-11 17:07 ` Baruch Siach
2019-12-11 17:49 ` Andrew Lunn
2019-12-12 8:50 ` Baruch Siach
2019-12-12 13:14 ` Andrew Lunn
2019-12-12 14:19 ` Andreas Tobler
2019-12-12 15:08 ` Baruch Siach
2019-12-12 15:13 ` Andrew Lunn
2019-12-12 15:23 ` Baruch Siach
2019-12-12 18:17 ` Baruch Siach
2019-12-12 18:32 ` Marek Behun
2019-12-12 18:48 ` Baruch Siach
2019-12-12 18:36 ` Marek Behun
2019-12-12 19:06 ` Baruch Siach
2019-12-12 19:31 ` Andrew Lunn
2019-12-12 19:41 ` Marek Behun
2019-12-12 20:49 ` Andrew Lunn
2019-12-15 10:13 ` Baruch Siach
2019-12-15 11:10 ` Baruch Siach
2019-12-15 14:53 ` Andrew Lunn [this message]
2019-12-15 15:08 ` Baruch Siach
2019-12-15 16:14 ` Andrew Lunn
2019-12-17 18:26 ` Baruch Siach
2019-12-18 14:30 ` Marek Behún
2019-12-18 16:04 ` Baruch Siach
2019-12-19 9:04 ` Baruch Siach
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