From: "Marek Behún" <marek.behun@nic.cz>
To: Baruch Siach <baruch@tkos.co.il>
Cc: Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
netdev@vger.kernel.org,
Denis Odintsov <d.odintsov@traviangames.com>,
Hubert Feurstein <h.feurstein@gmail.com>
Subject: Re: [BUG] mv88e6xxx: tx regression in v5.3
Date: Wed, 18 Dec 2019 15:30:35 +0100 [thread overview]
Message-ID: <20191218153035.11c3486d@dellmb> (raw)
In-Reply-To: <8736dlucai.fsf@tarshish>
Hi Baruch,
On Sun, 15 Dec 2019 12:13:25 +0200
Baruch Siach <baruch@tkos.co.il> wrote:
> Thanks. That is enough to fix the phylink issue triggered by commit
> 7fb5a711545 ("net: dsa: mv88e6xxx: drop adjust_link to enabled
> phylink").
>
> The Clearfog GT-8K DT has also this on the cpu side:
>
> &cp1_eth2 {
> status = "okay";
> phy-mode = "2500base-x";
> phys = <&cp1_comphy5 2>;
> fixed-link {
> speed = <2500>;
> full-duplex;
> };
> };
>
> Should I drop fixed-link here as well?
I would think yes. phy-mode = 2500base-x should already force 2500mbps,
the fixed-link should be irrelevant. Whether this is truly the case I
do not know, but on Turris Mox I do not use fixed-link with these.
>
> The call to mv88e6341_port_set_cmode() introduced in commit
> 7a3007d22e8 ("net: dsa: mv88e6xxx: fully support SERDES on Topaz
> family") still breaks port 5 (cpu) configuration. When called, its
> mode parameter is set to PHY_INTERFACE_MODE_2500BASEX (19).
>
> Any idea?
I shall look into this. On Turris Mox this works, so I will have to do
some experiments.
> Thanks,
> baruch
>
> --
> http://baruch.siach.name/blog/ ~. .~ Tk Open
> Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
> - baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il
> -
next prev parent reply other threads:[~2019-12-18 14:30 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-11 9:48 [BUG] mv88e6xxx: tx regression in v5.3 Baruch Siach
2019-12-11 13:11 ` Andrew Lunn
2019-12-11 17:07 ` Baruch Siach
2019-12-11 17:49 ` Andrew Lunn
2019-12-12 8:50 ` Baruch Siach
2019-12-12 13:14 ` Andrew Lunn
2019-12-12 14:19 ` Andreas Tobler
2019-12-12 15:08 ` Baruch Siach
2019-12-12 15:13 ` Andrew Lunn
2019-12-12 15:23 ` Baruch Siach
2019-12-12 18:17 ` Baruch Siach
2019-12-12 18:32 ` Marek Behun
2019-12-12 18:48 ` Baruch Siach
2019-12-12 18:36 ` Marek Behun
2019-12-12 19:06 ` Baruch Siach
2019-12-12 19:31 ` Andrew Lunn
2019-12-12 19:41 ` Marek Behun
2019-12-12 20:49 ` Andrew Lunn
2019-12-15 10:13 ` Baruch Siach
2019-12-15 11:10 ` Baruch Siach
2019-12-15 14:53 ` Andrew Lunn
2019-12-15 15:08 ` Baruch Siach
2019-12-15 16:14 ` Andrew Lunn
2019-12-17 18:26 ` Baruch Siach
2019-12-18 14:30 ` Marek Behún [this message]
2019-12-18 16:04 ` Baruch Siach
2019-12-19 9:04 ` Baruch Siach
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