From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C321C34021 for ; Mon, 17 Feb 2020 15:30:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DB98C20801 for ; Mon, 17 Feb 2020 15:30:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="Tx5/9Z59" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728657AbgBQPaj (ORCPT ); Mon, 17 Feb 2020 10:30:39 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:50096 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728292AbgBQPai (ORCPT ); Mon, 17 Feb 2020 10:30:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=ZqCsK9WpL7hYGvHC1Si6X9RclQ+pdX4CLpRu3V2wUfo=; b=Tx5/9Z592EPYVeVU1jZteqzyuC IbaZaicU2+hftxYtFfqHCcr8sHGqM5LcymkzfxZ9gpIJiYxYZqbQMfMh+MaVkyUMMojAza8/gjIYq jgCjl4y4eLkoOjRUb+189EDlnJBdNj3RCXAl/LFCtyheegboB1ODmZGndjXrOoiCg+1o=; Received: from andrew by vps0.lunn.ch with local (Exim 4.93) (envelope-from ) id 1j3iLw-0005Lq-R5; Mon, 17 Feb 2020 16:30:32 +0100 Date: Mon, 17 Feb 2020 16:30:32 +0100 From: Andrew Lunn To: Vladimir Oltean Cc: shawnguo@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, vivien.didelot@gmail.com, f.fainelli@gmail.com, davem@davemloft.net, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Manoil Subject: Re: [PATCH devicetree 4/4] arm64: dts: fsl: ls1028a: enable switch PHYs on RDB Message-ID: <20200217153032.GF31084@lunn.ch> References: <20200217144414.409-1-olteanv@gmail.com> <20200217144414.409-5-olteanv@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200217144414.409-5-olteanv@gmail.com> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Mon, Feb 17, 2020 at 04:44:14PM +0200, Vladimir Oltean wrote: > From: Claudiu Manoil > > Link the switch PHY nodes to the central MDIO controller PCIe endpoint > node on LS1028A (implemented as PF3) so that PHYs are accessible via > MDIO. > > Enable SGMII AN on the Felix PCS by telling PHYLINK that the VSC8514 > quad PHY is capable of in-band-status. > > The PHYs are used in poll mode due to an issue with the interrupt line > on current revisions of the LS1028A-RDB board. > > Signed-off-by: Claudiu Manoil > Signed-off-by: Alex Marginean > Signed-off-by: Vladimir Oltean Reviewed-by: Andrew Lunn Andrew