From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=0.6 required=3.0 tests=DATE_IN_PAST_06_12, DKIM_INVALID,DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57922C1975A for ; Sun, 15 Mar 2020 01:54:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2FC7D2071B for ; Sun, 15 Mar 2020 01:54:36 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="Sf7JcTOT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727552AbgCOByf (ORCPT ); Sat, 14 Mar 2020 21:54:35 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:36040 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727298AbgCOBye (ORCPT ); Sat, 14 Mar 2020 21:54:34 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=WB2hC7u1Rf4qwcDkIAtTzj5N6O1WK9yw8It6QfvYX8s=; b=Sf7JcTOTD2LZ6+7sTLcWuOplCE yy77P1D4tn4KKXL0wpo4MzgHT8qAwRbvVrz5O5+imHof7hjHKIkhUKGXlbaw0d8+1DHE05sPdSUo2 NzynINiGJAGhi3fg8MXQhGr1y3at2KVKwpPuvqGtc3gYDrkDHDDpOkWzbWp/+frYhjlY=; Received: from andrew by vps0.lunn.ch with local (Exim 4.93) (envelope-from ) id 1jDBp8-0001fW-SZ; Sat, 14 Mar 2020 19:47:50 +0100 Date: Sat, 14 Mar 2020 19:47:50 +0100 From: Andrew Lunn To: Russell King Cc: Florian Fainelli , Heiner Kallweit , "David S. Miller" , netdev@vger.kernel.org, Vivien Didelot Subject: Re: [PATCH net-next 4/8] net: dsa: mv88e6xxx: extend phylink to Serdes PHYs Message-ID: <20200314184750.GH5388@lunn.ch> References: <20200314101431.GF25745@shell.armlinux.org.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org > @@ -683,9 +754,14 @@ static void mv88e6xxx_mac_link_up(struct dsa_switch *ds, int port, > /* FIXME: for an automedia port, should we force the link > * down here - what if the link comes up due to "other" media > * while we're bringing the port up, how is the exclusivity > - * handled in the Marvell hardware? E.g. port 4 on 88E6532 > + * handled in the Marvell hardware? E.g. port 2 on 88E6390 > * shared between internal PHY and Serdes. > */ automedia makes things interesting. You have to read the cmode to know if the internal PHY or the SERDES has 'won'. I thimk my preference would of been to keep it simple and look at phy-mode in DT. If it is 1000BaseX, turn on the SERDES and turn off the internal PHY. But i know of at lease one person who wants auto media. > +static int mv88e6xxx_serdes_pcs_get_state(struct mv88e6xxx_chip *chip, > + u16 status, u16 lpa, > + struct phylink_link_state *state) > +{ At some point in the future, we might want to rename this. If i remember correct, the 1000BaseX and SGMII PCS uses different registers to the 10G PCS. We will need to look at the cmode to determine which PCS is in operation. Reviewed-by: Andrew Lunn Andrew