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[73.241.114.122]) by smtp.gmail.com with ESMTPSA id d23sm14529733pfq.210.2020.03.23.16.26.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Mar 2020 16:26:50 -0700 (PDT) Date: Mon, 23 Mar 2020 16:26:48 -0700 From: Richard Cochran To: Vladimir Oltean Cc: davem@davemloft.net, f.fainelli@gmail.com, vivien.didelot@gmail.com, andrew@lunn.ch, christian.herber@nxp.com, yangbo.lu@nxp.com, netdev@vger.kernel.org Subject: Re: [PATCH net-next 4/4] net: dsa: sja1105: configure the PTP_CLK pin as EXT_TS or PER_OUT Message-ID: <20200323232648.GC9140@localhost> References: <20200323225924.14347-1-olteanv@gmail.com> <20200323225924.14347-5-olteanv@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200323225924.14347-5-olteanv@gmail.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Tue, Mar 24, 2020 at 12:59:24AM +0200, Vladimir Oltean wrote: > From: Vladimir Oltean > > The SJA1105 switch family has a PTP_CLK pin which emits a signal with > fixed 50% duty cycle, but variable frequency and programmable start time. > > On the second generation (P/Q/R/S) switches, this pin supports even more > functionality. The use case described by the hardware documents talks > about synchronization via oneshot pulses: given 2 sja1105 switches, > arbitrarily designated as a master and a slave, the master emits a > single pulse on PTP_CLK, while the slave is configured to timestamp this > pulse received on its PTP_CLK pin (which must obviously be configured as > input). The difference between the timestamps then exactly becomes the > slave offset to the master. > > The only trouble with the above is that the hardware is very much tied > into this use case only, and not very generic beyond that: > - When emitting a oneshot pulse, instead of being told when to emit it, > the switch just does it "now" and tells you later what time it was, > via the PTPSYNCTS register. [ Incidentally, this is the same register > that the slave uses to collect the ext_ts timestamp from, too. ] > - On the sync slave, there is no interrupt mechanism on reception of a > new extts, and no FIFO to buffer them, because in the foreseen use > case, software is in control of both the master and the slave pins, > so it "knows" when there's something to collect. > > These 2 problems mean that: > - We don't support (at least yet) the quirky oneshot mode exposed by > the hardware, just normal periodic output. > - We abuse the hardware a little bit when we expose generic extts. > Because there's no interrupt mechanism, we need to poll at double the > frequency we expect to receive a pulse. Currently that means a > non-configurable "twice a second". > > Signed-off-by: Vladimir Oltean Acked-by: Richard Cochran