From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4024C43331 for ; Tue, 24 Mar 2020 19:34:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9CA1420714 for ; Tue, 24 Mar 2020 19:34:42 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=messagingengine.com header.i=@messagingengine.com header.b="v8444Haq" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727747AbgCXTel (ORCPT ); Tue, 24 Mar 2020 15:34:41 -0400 Received: from new4-smtp.messagingengine.com ([66.111.4.230]:50305 "EHLO new4-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727103AbgCXTel (ORCPT ); Tue, 24 Mar 2020 15:34:41 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailnew.nyi.internal (Postfix) with ESMTP id 0A282580061; Tue, 24 Mar 2020 15:34:40 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Tue, 24 Mar 2020 15:34:40 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:date:from :in-reply-to:message-id:mime-version:references:subject:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=5sROIFoYkVg+nsgg8I0lgV6vFG+e4iTQfGXWpUeNrN8=; b=v8444Haq hEdsop2LpECMXt3ch5Lv8dk8rLMj1eAbb7L5RWV2WPh+72b3UFlcZv4aLSiiQJhE fpCIwN7LXqN74Qq66S7effg7dZpZ7mqXAJ98p1/1msVvB9xhxrN3zlH9a0ZGtM1M jN4GRr2Hu77cguxnr0JjU56CBVonFzGVbIgxOlWzf4szxXhRO1WHb8LR7uVyhg/q +oNZfTl978A6WaA1veXd665hWzta2PXcQAC5CXj7LuKix9vRKvFt+ycrJUrfREgy wNijvS7doiwffxAGKTa5QnlUqdElKRLucbAeqpCw8DSGhTdOZbKDLIa+jfcaY+H1 OdPzcuKfahJZJA== X-ME-Sender: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedugedrudehuddgleehucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucenucfjughrpefhvffufffkofgjfhgggfestdekre dtredttdenucfhrhhomhepkfguohcuufgthhhimhhmvghluceoihguohhstghhsehiugho shgthhdrohhrgheqnecukfhppeejledrudektddrleegrddvvdehnecuvehluhhsthgvrh fuihiivgepieenucfrrghrrghmpehmrghilhhfrhhomhepihguohhstghhsehiughoshgt hhdrohhrgh X-ME-Proxy: Received: from splinter.mtl.com (bzq-79-180-94-225.red.bezeqint.net [79.180.94.225]) by mail.messagingengine.com (Postfix) with ESMTPA id CC7A43065930; Tue, 24 Mar 2020 15:34:35 -0400 (EDT) From: Ido Schimmel To: netdev@vger.kernel.org Cc: davem@davemloft.net, jiri@mellanox.com, kuba@kernel.org, andrew@lunn.ch, f.fainelli@gmail.com, vivien.didelot@gmail.com, roopa@cumulusnetworks.com, nikolay@cumulusnetworks.com, mlxsw@mellanox.com, Ido Schimmel Subject: [PATCH net-next 08/15] mlxsw: reg: Extend QPCR register Date: Tue, 24 Mar 2020 21:32:43 +0200 Message-Id: <20200324193250.1322038-9-idosch@idosch.org> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200324193250.1322038-1-idosch@idosch.org> References: <20200324193250.1322038-1-idosch@idosch.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Ido Schimmel The QoS Policer Configuration Register (QPCR) is used to configure hardware policers. Extend this register with following fields and defines which will be used by subsequent patches: 1. Violate counter: reads number of packets dropped by the policer 2. Clear counter: to ensure we start counting from 0 3. Rate and burst size limits Signed-off-by: Ido Schimmel Reviewed-by: Jiri Pirko --- drivers/net/ethernet/mellanox/mlxsw/reg.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h index 1bc65e597de0..192578632657 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h @@ -3296,6 +3296,12 @@ MLXSW_ITEM32(reg, qpcr, g, 0x00, 14, 2); */ MLXSW_ITEM32(reg, qpcr, pid, 0x00, 0, 14); +/* reg_qpcr_clear_counter + * Clear counters. + * Access: OP + */ +MLXSW_ITEM32(reg, qpcr, clear_counter, 0x04, 31, 1); + /* reg_qpcr_color_aware * Is the policer aware of colors. * Must be 0 (unaware) for cpu port. @@ -3393,6 +3399,17 @@ enum mlxsw_reg_qpcr_action { */ MLXSW_ITEM32(reg, qpcr, violate_action, 0x18, 0, 4); +/* reg_qpcr_violate_count + * Counts the number of times violate_action happened on this PID. + * Access: RW + */ +MLXSW_ITEM64(reg, qpcr, violate_count, 0x20, 0, 64); + +#define MLXSW_REG_QPCR_LOWEST_CIR 1 +#define MLXSW_REG_QPCR_HIGHEST_CIR (2 * 1000 * 1000 * 1000) /* 2Gpps */ +#define MLXSW_REG_QPCR_LOWEST_CBS 4 +#define MLXSW_REG_QPCR_HIGHEST_CBS 24 + static inline void mlxsw_reg_qpcr_pack(char *payload, u16 pid, enum mlxsw_reg_qpcr_ir_units ir_units, bool bytes, u32 cir, u16 cbs) -- 2.24.1