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From: Florian Fainelli <f.fainelli@gmail.com>
To: netdev@vger.kernel.org
Cc: Florian Fainelli <f.fainelli@gmail.com>,
	Andrew Lunn <andrew@lunn.ch>,
	Vivien Didelot <vivien.didelot@savoirfairelinux.com>,
	linux-kernel@vger.kernel.org (open list),
	davem@davemloft.net, kuba@kernel.org
Subject: [PATCH net 3/4] net: dsa: b53: Fix ARL register definitions
Date: Mon, 13 Apr 2020 21:16:29 -0700	[thread overview]
Message-ID: <20200414041630.5740-4-f.fainelli@gmail.com> (raw)
In-Reply-To: <20200414041630.5740-1-f.fainelli@gmail.com>

The ARL {MAC,VID} tuple and the forward entry were off by 0x10 bytes,
which means that when we read/wrote from/to ARL bin index 0, we were
actually accessing the ARLA_RWCTRL register.

Fixes: 1da6df85c6fb ("net: dsa: b53: Implement ARL add/del/dump operations")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
 drivers/net/dsa/b53/b53_regs.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dsa/b53/b53_regs.h b/drivers/net/dsa/b53/b53_regs.h
index 2a9f421680aa..d914e756cdab 100644
--- a/drivers/net/dsa/b53/b53_regs.h
+++ b/drivers/net/dsa/b53/b53_regs.h
@@ -304,7 +304,7 @@
  *
  * BCM5325 and BCM5365 share most definitions below
  */
-#define B53_ARLTBL_MAC_VID_ENTRY(n)	(0x10 * (n))
+#define B53_ARLTBL_MAC_VID_ENTRY(n)	((0x10 * (n)) + 0x10)
 #define   ARLTBL_MAC_MASK		0xffffffffffffULL
 #define   ARLTBL_VID_S			48
 #define   ARLTBL_VID_MASK_25		0xff
@@ -316,7 +316,7 @@
 #define   ARLTBL_VALID_25		BIT(63)
 
 /* ARL Table Data Entry N Registers (32 bit) */
-#define B53_ARLTBL_DATA_ENTRY(n)	((0x10 * (n)) + 0x08)
+#define B53_ARLTBL_DATA_ENTRY(n)	((0x10 * (n)) + 0x18)
 #define   ARLTBL_DATA_PORT_ID_MASK	0x1ff
 #define   ARLTBL_TC(tc)			((3 & tc) << 11)
 #define   ARLTBL_AGE			BIT(14)
-- 
2.17.1


  parent reply	other threads:[~2020-04-14  4:17 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-14  4:16 [PATCH net 0/4] net: dsa: b53: Various ARL fixes Florian Fainelli
2020-04-14  4:16 ` [PATCH net 1/4] net: dsa: b53: Lookup VID in ARL searches when VLAN is enabled Florian Fainelli
2020-04-14 14:03   ` Andrew Lunn
2020-04-14  4:16 ` [PATCH net 2/4] net: dsa: b53: Fix valid setting for MDB entries Florian Fainelli
2020-04-14 14:06   ` Andrew Lunn
2020-04-14  4:16 ` Florian Fainelli [this message]
2020-04-14 14:07   ` [PATCH net 3/4] net: dsa: b53: Fix ARL register definitions Andrew Lunn
2020-04-14  4:16 ` [PATCH net 4/4] net: dsa: b53: Rework ARL bin logic Florian Fainelli
2020-04-14 14:16   ` Andrew Lunn
2020-04-14 15:47 ` [PATCH net 0/4] net: dsa: b53: Various ARL fixes Florian Fainelli
2020-04-14 23:41   ` David Miller

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