From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46757C83000 for ; Tue, 28 Apr 2020 18:01:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1882C206A1 for ; Tue, 28 Apr 2020 18:01:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="ObH8Xw93" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728563AbgD1SBw (ORCPT ); Tue, 28 Apr 2020 14:01:52 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:57612 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728023AbgD1SBq (ORCPT ); Tue, 28 Apr 2020 14:01:46 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Type:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=S+zv5V8pEKl7jEv6i1WNUlxnbRwh2XNMJgQW8R3h33M=; b=ObH8Xw93wBjCJDAOZ9S3BP0lnq hrjI1PvO0sPHmRLUvyVYtzsOXzu6fcK4xAJgo63cr3N5+g7oaeKIs4EVCfmEhxrxs6HzYci1xwy0r dyPFa5dLda0fXBe/8r1zpvdhi38sDl500/stMt0Rv7kdThiz3JBkrT4VRyT1V4rvQthA=; Received: from andrew by vps0.lunn.ch with local (Exim 4.93) (envelope-from ) id 1jTUYC-0007z5-KH; Tue, 28 Apr 2020 20:01:44 +0200 Date: Tue, 28 Apr 2020 20:01:44 +0200 From: Andrew Lunn To: Andy Duan Cc: netdev , Chris Healy , Andy Duan , Leonard Crestez Subject: Re: [PATCH net-next] net: ethernet: fec: Prevent MII event after MII_SPEED write Message-ID: <20200428180144.GA30612@lunn.ch> References: <20200428175833.30517-1-andrew@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20200428175833.30517-1-andrew@lunn.ch> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Tue, Apr 28, 2020 at 07:58:33PM +0200, Andrew Lunn wrote: > The change to polled IO for MDIO completion assumes that MII events > are only generated for MDIO transactions. However on some SoCs writing > to the MII_SPEED register can also trigger an MII event. As a result, > the next MDIO read has a pending MII event, and immediately reads the > data registers before it contains useful data. When the read does > complete, another MII event is posted, which results in the next read > also going wrong, and the cycle continues. > > By writing 0 to the MII_DATA register before writing to the speed > register, this MII event for the MII_SPEED is suppressed, and polled > IO works as expected. Hi Andy Could you get your LAVA instances to test this? Or do we need to wait for it to make its way into net-next? Thanks Andrew