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Tue, 2 Jun 2020 23:29:10 +0000 Date: Tue, 2 Jun 2020 20:29:03 -0300 From: Jason Gunthorpe To: "Saleem, Shiraz" Cc: Leon Romanovsky , "Kirsher, Jeffrey T" , "dledford@redhat.com" , "davem@davemloft.net" , "gregkh@linuxfoundation.org" , "linux-rdma@vger.kernel.org" , "netdev@vger.kernel.org" , "nhorman@redhat.com" , "sassmann@redhat.com" , "poswald@suse.com" Subject: Re: [RDMA RFC v6 00/16] Intel RDMA Driver Updates 2020-05-19 Message-ID: <20200602232903.GD65026@mellanox.com> References: <20200520070415.3392210-1-jeffrey.t.kirsher@intel.com> <20200521141247.GQ24561@mellanox.com> <9DD61F30A802C4429A01CA4200E302A7EE04047F@fmsmsx124.amr.corp.intel.com> <20200527050855.GB349682@unreal> <9DD61F30A802C4429A01CA4200E302A7EE045C3B@fmsmsx124.amr.corp.intel.com> <20200601142840.GE4962@mellanox.com> <9DD61F30A802C4429A01CA4200E302A7EE04CC42@fmsmsx124.amr.corp.intel.com> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9DD61F30A802C4429A01CA4200E302A7EE04CC42@fmsmsx124.amr.corp.intel.com> X-ClientProxiedBy: MN2PR12CA0013.namprd12.prod.outlook.com (2603:10b6:208:a8::26) To VI1PR05MB4141.eurprd05.prod.outlook.com (2603:10a6:803:44::15) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from mlx.ziepe.ca (193.47.165.251) by MN2PR12CA0013.namprd12.prod.outlook.com (2603:10b6:208:a8::26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3045.19 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: sXM9XZUpdGLqJb8+djdDqVcSmCLbruVKa+2Qmr9Lj5E2QJYq3Kl8wFnw+WqImc+QXqzog4utqnoC9Ttpq7vd/UEBaAsp/ezZVyRlKvHBTywI6Ot8e91HLXrIU3+guChoXcYmqNg2KOXN0bQ6G21YreN+OZsD6J5MBfRVLEv5c5ZFRKpGjicza+m9Bl9i5M2YBrsC4pyMyt/cXQh3FIdbTqAJoo8L+L6O9HjWWhV3JhbVf8+U5S/0ImdZ6kEzYoLTXxN8xh16w6i3SeMs0TCdLrNmtrbO7XJtTl5APJc/KqujzTqTegsxvcGLCzJFrpL1B9JyLGHu92r4GmB/78Eb//oAMpMDGBNA9fJ35U1jGuKyjI6+qXKjDtXexSaTWscDHUUebgSs1t13JRzElbI0UkJAr9RsIU8Btc/E7dRwZp65j8V0huZ9XsLykkx2A5gZG3pmWM9QSdGk8em9d6WNd8ARJHqhQDHiGR42fk/lQ09OoXOLUvMjb/KIZ5hp3GYE X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 793a0f5d-1bf2-4f39-60c7-08d8074cc0a7 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jun 2020 23:29:10.7446 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: cIDhby2pvmiFP6XFoAU/bHRmWXqeux/35qHp+0rNSB8w8s9tEKxG8SFyjCBSunARMek4Lv8+s4Q1aWGtQ1d+CQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR05MB5759 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Tue, Jun 02, 2020 at 10:59:46PM +0000, Saleem, Shiraz wrote: > > Subject: Re: [RDMA RFC v6 00/16] Intel RDMA Driver Updates 2020-05-19 > > > > On Fri, May 29, 2020 at 03:21:05PM +0000, Saleem, Shiraz wrote: > > > > Subject: Re: [RDMA RFC v6 00/16] Intel RDMA Driver Updates > > > > 2020-05-19 > > > > > > > > > > [......] > > > > > > > > > > > I'm looking on it and see static assignments, to by dynamic you will need "to > > play" > > > > with hw_shifts/hw_masks later, but you don't. What am I missing? > > > > > > > > + for (i = 0; i < IRDMA_MAX_SHIFTS; ++i) > > > > + dev->hw_shifts[i] = i40iw_shifts[i]; > > > > + > > > > + for (i = 0; i < IRDMA_MAX_MASKS; ++i) > > > > + dev->hw_masks[i] = i40iw_masks[i]; > > > > > > > > > > > > > > we still need to use the custom macro FLD_LS_64 without FIELD_PREP > > > > > in this case as FIELD_PREP expects compile time constants. > > > > > +#define FLD_LS_64(dev, val, field) \ > > > > > + (((u64)(val) << (dev)->hw_shifts[field ## _S]) & > > > > > +(dev)->hw_masks[field ## _M]) > > > > > And the shifts are still required for these fields which causes a > > > > > bit of inconsistency > > > > > > > > > > > > > > The device hw_masks/hw_shifts array store masks/shifts of those > > > descriptor fields that have same name across HW generations but differ > > > in some attribute such as field width. Yes they are statically > > > assigned, initialized with values from i40iw_masks and icrdma_masks, > > > depending on the HW generation. We can even use GENMASK for the values > > > in i40iw_masks[] , icrdma_masks[] but FIELD_PREP cant be used on > > > dev->hw_masks[] > > > > So compute the shift and mask when building i40iw_shifts array using the compile > > time constant? > > > > i40iw_shifts[] and i40iw_mask[] are setup as compile constants > and used to initialize dev->hw_masks[], dev->hw_shifts[] if the device is gen1. > I still don't see how FIELD_PREP can be used on a value and > dev->hw_masks[i]. Well, you can't, you'd still have to use this indirection, the point was to make the #define macros consistent Jason