Re: bug: net: dsa: mv88e6xxx: unable to tx or rx with Clearfog GT 8K (with git bisect)

[Russell King - ARM Linux admin <linux@armlinux.org.uk>]

On Fri, Jul 17, 2020 at 12:50:07PM +0000, Martin Rowe wrote:
> On Fri, 17 Jul 2020 at 09:22, Russell King - ARM Linux admin
> <linux@armlinux.org.uk> wrote:
> > The key file is /sys/kernel/debug/mv88e6xxx.0/regs - please send the
> > contents of that file.
> 
> $ cat regs.broken
>     GLOBAL GLOBAL2 SERDES     0    1    2    3    4    5
>  0:  c800       0    ffff  9e07 9e4f 100f 100f 9e4f 170b
>  1:     0    803e    ffff     3    3    3    3    3 201f
                                                      ^^^^
This is where the problem is.

>  1:     0    803e    ffff     3    3    3    3    3 203f
                                                      ^^^^

In the broken case, the link is forced down, in the working case, the
link is forced up.

What seems to be happening is:

dsa_port_link_register_of() gets called, and we do this:

                phy_np = of_parse_phandle(dp->dn, "phy-handle", 0);
                if (of_phy_is_fixed_link(dp->dn) || phy_np) {
                        if (ds->ops->phylink_mac_link_down)
                                ds->ops->phylink_mac_link_down(ds, port,
                                        MLO_AN_FIXED, PHY_INTERFACE_MODE_NA);
                        return dsa_port_phylink_register(dp);

which forces the link down, and for some reason the link never comes
back up.

One of the issues here is of_phy_is_fixed_link() - it is dangerous.
The function name leads you astray - it suggests that if it returns
true, then you have a fixed link, but it also returns true of you
have managed!="auto" in DT, so it's actually fixed-or-inband-link.

Andrew, any thoughts?

I think it's looking more and more like we need my phylink hack to
grab the "defaults" for the port on phylink_start() to allow DSA to
work sanely with phylink, so that phylink can have the complete
information about the CPU port at all times.

-- 
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