From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23459C433DF for ; Fri, 31 Jul 2020 19:55:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0424C21744 for ; Fri, 31 Jul 2020 19:55:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726276AbgGaTzD (ORCPT ); Fri, 31 Jul 2020 15:55:03 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:37442 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725767AbgGaTzC (ORCPT ); Fri, 31 Jul 2020 15:55:02 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1k1b7K-007jcO-KE; Fri, 31 Jul 2020 21:54:58 +0200 Date: Fri, 31 Jul 2020 21:54:58 +0200 From: Andrew Lunn To: Asmaa Mnebhi Cc: David Thompson , "netdev@vger.kernel.org" , "davem@davemloft.net" , "kuba@kernel.org" , Jiri Pirko Subject: Re: [PATCH net-next] Add Mellanox BlueField Gigabit Ethernet driver Message-ID: <20200731195458.GA1843538@lunn.ch> References: <1596047355-28777-1-git-send-email-dthompson@mellanox.com> <20200731174222.GE1748118@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Fri, Jul 31, 2020 at 06:54:04PM +0000, Asmaa Mnebhi wrote: Hi Asmaa Please don't send HTML obfusticated emails to mailing lists. > > +static int mlxbf_gige_mdio_read(struct mii_bus *bus, int phy_add, int > > > +phy_reg) { > > > + struct mlxbf_gige *priv = bus->priv; > > > + u32 cmd; > > > + u32 ret; > > > + > > > + /* If the lock is held by something else, drop the request. > > > + * If the lock is cleared, that means the busy bit was cleared. > > > + */ > > > > How can this happen? The mdio core has a mutex which prevents parallel access? > > > > This is a HW Lock. It is an actual register. So another HW entity can be > holding that lock and reading/changing the values in the HW registers. You have not explains how that can happen? Is there something in the driver i missed which takes a backdoor to read/write MDIO transactions? > > + ret = mlxbf_gige_mdio_poll_bit(priv, MLXBF_GIGE_MDIO_GW_LOCK_MASK); > > > + if (ret) > > > + return -EBUSY; > > > > PHY drivers are not going to like that. They are not going to retry. What is > likely to happen is that phylib moves into the ERROR state, and the PHY driver > grinds to a halt. > > > > This is a fairly quick HW transaction. So I don’t think it would cause and > issue for the PHY drivers. In this case, we use the micrel KSZ9031. We haven’t > seen issues. So you have happy to debug hard to find and reproduce issues when it does happen? Or would you like to spend a little bit of time now and just prevent it happening at all? Andrew