From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0FFE4C43461 for ; Fri, 4 Sep 2020 19:09:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B719C206B8 for ; Fri, 4 Sep 2020 19:09:50 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=skidata.com header.i=@skidata.com header.b="GXk85QO/" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727114AbgIDTJt (ORCPT ); Fri, 4 Sep 2020 15:09:49 -0400 Received: from mail1.skidata.com ([91.230.2.99]:39410 "EHLO mail1.skidata.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726133AbgIDTJs (ORCPT ); Fri, 4 Sep 2020 15:09:48 -0400 X-Greylist: delayed 429 seconds by postgrey-1.27 at vger.kernel.org; Fri, 04 Sep 2020 15:09:47 EDT DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=skidata.com; i=@skidata.com; q=dns/txt; s=selector1; t=1599246587; x=1630782587; h=date:from:to:cc:subject:message-id:references: mime-version:content-transfer-encoding:in-reply-to; bh=6rmHrzDhiKxlC/IwpKfiGf41Y+4Jv+4sq1JsIM6Bpls=; b=GXk85QO/4Lt+ifLymH/uXHkWopx2HS2uUv8DiPTCrOhmi1k0aI80kFpg ezHPxKV/TPlGAW7nf+ITDlB2PVQ8GgnTBahmsk0DycdWWLvSp9bHWZZXQ 6x8nMiOaKStM9uAaAJxT6NxqwCXEkNphVUz+0TkJ8lkkjO4TrRBByKYCR 14q3P2WiaTKGpdyxKybiIZLZ58/UTf7VKvUGW+Z7xhQX3mBeECNcH8oZj jpshqbeXvMdHFDzABQaw3pQKp48CAxm2+CVwN4/ympEYArzekEs6w13qR SU+eNoXwX3v8H6xwHqcczxNyuGXYBI27E9KIjpZ/SOxs3su57Hn9I6nhY g==; IronPort-SDR: zODo0nu9hd4lq5jRIk7ApxOqp0M48UhRONlUsdxWVA6nkD7rWB9pYy4EIaZhL2DM1FO5sIx8sH SJuGE1nxh6Sqe7d3qwNgIh1bUhziUzEtz5lKLlURHBAQEHOi1BPgKlPNtmbTL1szABxyDuYXQ/ NudsB0tetX7gW2dd2Ew8rulDxqYzEJqh9lZMvxxTVptzz/8PPQlAiyeW2nturtsYw1hgATCJaO ZJ7GeBQeMojUzf67FbwF2ikP+xonVsJbccJYZQr+OEIwtrde8ySYI+PyeVd2EE6Uyy/rt/0dSg R1U= X-IronPort-AV: E=Sophos;i="5.76,391,1592863200"; d="scan'208";a="26605418" Date: Fri, 4 Sep 2020 21:02:28 +0200 From: Richard Leitner To: Marek Vasut CC: Andrew Lunn , , Christoph Niedermaier , "David S . Miller" , NXP Linux Team , Shawn Guo Subject: Re: [PATCH] net: fec: Fix PHY init after phy_reset_after_clk_enable() Message-ID: <20200904190228.GG81961@pcleri> References: <20200903202712.143878-1-marex@denx.de> <20200903210011.GD3112546@lunn.ch> <20200903215331.GG3112546@lunn.ch> <02ce2afb-7b9f-ba35-63a5-7496c7a39e6e@denx.de> <20200903220847.GI3112546@lunn.ch> <20200904140245.GO3112546@lunn.ch> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Originating-IP: [192.168.111.252] X-ClientProxiedBy: sdex6srv.skidata.net (192.168.111.84) To sdex5srv.skidata.net (192.168.111.83) Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Fri, Sep 04, 2020 at 05:26:14PM +0200, Marek Vasut wrote: > On 9/4/20 4:02 PM, Andrew Lunn wrote: > > On Fri, Sep 04, 2020 at 12:45:44AM +0200, Marek Vasut wrote: > >> On 9/4/20 12:08 AM, Andrew Lunn wrote: > >>>>> b4 am 20200903043947.3272453-1-f.fainelli@gmail.com > >>>> > >>>> That might be a fix for the long run, but I doubt there's any chance to > >>>> backport it all to stable, is there ? > >>> > >>> No. For stable we need something simpler. > >> > >> Like this patch ? > > > > Yes. > > > > But i would like to see a Tested-By: or similar from Richard > > Leitner. Why does the current code work for his system? Does your > > change break it? > > I have the IRQ line connected and described in DT. The reset clears the > IRQ settings done by the SMSC PHY driver. The PHY works fine if I use > polling, because then even if no IRQs are generated by the PHY, the PHY > framework reads the status updates from the PHY periodically and the > default settings of the PHY somehow work (even if they are slightly > incorrect). I suspect that's how Richard had it working. I have different PHYs on different PCBs in use, but IIRC none of them has the IRQ line defined in the DT. I will take a look at it, test your patch and give feedback ASAP. Unfortunately it's unlikely that this will be before monday 😕 Hope that's ok. regards;rl