From: Richard Leitner <richard.leitner@skidata.com>
To: Marek Vasut <marex@denx.de>
Cc: Andrew Lunn <andrew@lunn.ch>, <netdev@vger.kernel.org>,
Christoph Niedermaier <cniedermaier@dh-electronics.com>,
"David S . Miller" <davem@davemloft.net>,
NXP Linux Team <linux-imx@nxp.com>,
Shawn Guo <shawnguo@kernel.org>
Subject: Re: [PATCH] net: fec: Fix PHY init after phy_reset_after_clk_enable()
Date: Wed, 9 Sep 2020 10:38:13 +0200 [thread overview]
Message-ID: <20200909083813.GI81961@pcleri> (raw)
In-Reply-To: <dce19310-edbd-e26b-77cd-f03f3350a477@denx.de>
On Fri, Sep 04, 2020 at 09:23:26PM +0200, Marek Vasut wrote:
> On 9/4/20 9:02 PM, Richard Leitner wrote:
> > On Fri, Sep 04, 2020 at 05:26:14PM +0200, Marek Vasut wrote:
> >> On 9/4/20 4:02 PM, Andrew Lunn wrote:
> >>> On Fri, Sep 04, 2020 at 12:45:44AM +0200, Marek Vasut wrote:
> >>>> On 9/4/20 12:08 AM, Andrew Lunn wrote:
> >>>>>>> b4 am 20200903043947.3272453-1-f.fainelli@gmail.com
> >>>>>>
> >>>>>> That might be a fix for the long run, but I doubt there's any chance to
> >>>>>> backport it all to stable, is there ?
> >>>>>
> >>>>> No. For stable we need something simpler.
> >>>>
> >>>> Like this patch ?
> >>>
> >>> Yes.
> >>>
> >>> But i would like to see a Tested-By: or similar from Richard
> >>> Leitner. Why does the current code work for his system? Does your
> >>> change break it?
> >>
> >> I have the IRQ line connected and described in DT. The reset clears the
> >> IRQ settings done by the SMSC PHY driver. The PHY works fine if I use
> >> polling, because then even if no IRQs are generated by the PHY, the PHY
> >> framework reads the status updates from the PHY periodically and the
> >> default settings of the PHY somehow work (even if they are slightly
> >> incorrect). I suspect that's how Richard had it working.
> >
> > I have different PHYs on different PCBs in use, but IIRC none of them
> > has the IRQ line defined in the DT.
> > I will take a look at it, test your patch and give feedback ASAP.
> > Unfortunately it's unlikely that this will be before monday 😕
> > Hope that's ok.
>
> That's totally fine, thanks !
Hi, sorry for the delay.
I've applied the patch to our kernel and did some basic tests on
different custom imx6 PCBs. As everything seems to work fine for our
"non-irq configuration" please feel free to add
Tested-by: Richard Leitner <richard.leitner@skidata.com>
regards;rl
next prev parent reply other threads:[~2020-09-09 8:47 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-03 20:27 [PATCH] net: fec: Fix PHY init after phy_reset_after_clk_enable() Marek Vasut
2020-09-03 21:00 ` Andrew Lunn
2020-09-03 21:36 ` Marek Vasut
2020-09-03 21:53 ` Andrew Lunn
2020-09-03 22:03 ` Marek Vasut
2020-09-03 22:08 ` Andrew Lunn
2020-09-03 22:45 ` Marek Vasut
2020-09-04 14:02 ` Andrew Lunn
2020-09-04 15:26 ` Marek Vasut
2020-09-04 19:02 ` Richard Leitner
2020-09-04 19:23 ` Marek Vasut
2020-09-09 8:38 ` Richard Leitner [this message]
2020-09-26 18:52 ` Marek Vasut
2020-09-28 13:03 ` Richard Leitner
2020-10-06 9:15 ` Marek Vasut
2020-09-09 12:24 ` Andrew Lunn
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