From: Andrew Lunn <andrew@lunn.ch>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: netdev@vger.kernel.org, opendmb@gmail.com,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
"open list:BROADCOM ETHERNET PHY DRIVERS"
<bcm-kernel-feedback-list@broadcom.com>,
open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH net-next v2] net: phy: bcm7xxx: request and manage GPHY clock
Date: Thu, 17 Sep 2020 15:11:28 +0200 [thread overview]
Message-ID: <20200917131128.GK3526428@lunn.ch> (raw)
In-Reply-To: <20200917020413.2313461-1-f.fainelli@gmail.com>
On Wed, Sep 16, 2020 at 07:04:13PM -0700, Florian Fainelli wrote:
> The internal Gigabit PHY on Broadcom STB chips has a digital clock which
> drives its MDIO interface among other things, the driver now requests
> and manage that clock during .probe() and .remove() accordingly.
>
> Because the PHY driver can be probed with the clocks turned off we need
> to apply the dummy BMSR workaround during the driver probe function to
> ensure subsequent MDIO read or write towards the PHY will succeed.
Hi Florian
Is it worth mentioning this in the DT binding? It is all pretty much
standard lego pieces, but it has taken you a while to assemble them in
the correct way. So giving hits to others who might want to uses these
STB chips could be nice.
Andrew
next prev parent reply other threads:[~2020-09-17 13:12 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-17 2:04 [PATCH net-next v2] net: phy: bcm7xxx: request and manage GPHY clock Florian Fainelli
2020-09-17 13:11 ` Andrew Lunn [this message]
2020-09-17 16:19 ` Florian Fainelli
2020-09-18 1:46 ` Andrew Lunn
2020-09-19 0:22 ` David Miller
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