dsa: mv88e6xxx: serdes link without phy

dsa: mv88e6xxx: serdes link without phy

[Chris Packham]

Hi,

We have a chassis platform that (ab)uses an Ethernet backplane 
consisting of MV88E6097 on the line cards connecting to a MV98DX160 on 
the chassis controller(s).

I'm attempting to update the line cards to a modern kernel trying to do 
away with a lot of custom hackery from our older kernel. One problem I'm 
having is that I can't find a way of telling the DSA/MV88E6097 driver 
about the ports facing the backplane.

Currently I have the following in my dts

         switch@0 {
                 compatible = "marvell,mv88e6085";
                 #address-cells =  <1>;
                 #size-cells = <0>;
                 dsa,member = <0 0>;

                 reg = <0x1>;

                 ports {
                         #address-cells =  <1>;
                         #size-cells = <0>;

                         port@8 {
                                 reg = <8>;
                                 label = "internal8";
                                 phy-mode = "rgmii-id";
                                 fixed-link {
                                         speed = <1000>;
                                         full-duplex;
                                 };
                         };
                         port@9 {
                                 reg = <9>;
                                 label = "internal9";
                                 phy-mode = "rgmii-id";
                                 fixed-link {
                                         speed = <1000>;
                                         full-duplex;
                                 };
                         };
                         port@10 {
                                 reg = <10>;
                                 label = "cpu";
                                 ethernet = <&eth0port>;
                                 phy-mode = "rgmii-id";
                                 fixed-link {
                                         speed = <1000>;
                                         full-duplex;
                                 };
                         };
                 };
         };

The problem is that by declaring ports 8 & 9 as fixed link the driver 
sets the ForcedLink in the PCS control register. Which mostly works. 
Except if I add a chassis controller while the system is running (or one 
is rebooted) then the newly added controller doesn't see a link on the 
serdes. If I hack the code to clear the ForcedLink bit then the 
controller will correctly see the link state.

I think I need a way of telling the driver that it is directly wired 
(i.e. there is no PHY) but that it should not force the link state. I'm 
not sure that fixed-link is necessarily the right tool for the job but 
without it the driver complains about having no PHY on ports 8 and 9.

Any thoughts on how I can convey my hardware setup to the driver?

Thanks,
Chris

Re: dsa: mv88e6xxx: serdes link without phy

[Andrew Lunn]

>                          port@8 {
>                                  reg = <8>;
>                                  label = "internal8";
>                                  phy-mode = "rgmii-id";
>                                  fixed-link {
>                                          speed = <1000>;
>                                          full-duplex;
>                                  };
>                          };
>                          port@9 {
>                                  reg = <9>;
>                                  label = "internal9";
>                                  phy-mode = "rgmii-id";
>                                  fixed-link {
>                                          speed = <1000>;
>                                          full-duplex;
>                                  };
>                          };

> 
> The problem is that by declaring ports 8 & 9 as fixed link the driver 
> sets the ForcedLink in the PCS control register. Which mostly works. 
> Except if I add a chassis controller while the system is running (or one 
> is rebooted) then the newly added controller doesn't see a link on the 
> serdes.

Hi Chris

You say SERDES here, but in DT you have rgmii-id?

Can you run 1000Base-X over these links? If you can, it is probably
worth chatting to Russell King about using inband-signalling, and what
is needed to make it work without having back to back SFPs. If i
remember correctly, Russell has said not much is actually needed.

   Andrew

Re: dsa: mv88e6xxx: serdes link without phy

[Chris Packham]

On 1/10/20 2:24 pm, Andrew Lunn wrote:
>>                           port@8 {
>>                                   reg = <8>;
>>                                   label = "internal8";
>>                                   phy-mode = "rgmii-id";
>>                                   fixed-link {
>>                                           speed = <1000>;
>>                                           full-duplex;
>>                                   };
>>                           };
>>                           port@9 {
>>                                   reg = <9>;
>>                                   label = "internal9";
>>                                   phy-mode = "rgmii-id";
>>                                   fixed-link {
>>                                           speed = <1000>;
>>                                           full-duplex;
>>                                   };
>>                           };
>> The problem is that by declaring ports 8 & 9 as fixed link the driver
>> sets the ForcedLink in the PCS control register. Which mostly works.
>> Except if I add a chassis controller while the system is running (or one
>> is rebooted) then the newly added controller doesn't see a link on the
>> serdes.
> Hi Chris
>
> You say SERDES here, but in DT you have rgmii-id?
Yeah that's mostly because it was copied from the CPU port (which is 
RGMII with internal delay). The Marvell datasheet says "SERDES" so I 
wasn't really sure what to put here
> Can you run 1000Base-X over these links?
With some reading "1000base-x" does seem the right thing to say here. 
It's even what is reflected in the CMODE field for those ports.
> If you can, it is probably
> worth chatting to Russell King about using inband-signalling, and what
> is needed to make it work without having back to back SFPs. If i
> remember correctly, Russell has said not much is actually needed.

That'd be ideal. The sticking point seems to be allowing it to have no PHY.

Re: dsa: mv88e6xxx: serdes link without phy

[Andrew Lunn]

> > Can you run 1000Base-X over these links?
> With some reading "1000base-x" does seem the right thing to say here. 
> It's even what is reflected in the CMODE field for those ports.

One more thing you might need is

managed = "in-band-status";

> > If you can, it is probably
> > worth chatting to Russell King about using inband-signalling, and what
> > is needed to make it work without having back to back SFPs. If i
> > remember correctly, Russell has said not much is actually needed.
> 
> That'd be ideal. The sticking point seems to be allowing it to have no PHY.

I think there is more to it than that. This is new ground to some
extent.

	Andrew

Re: dsa: mv88e6xxx: serdes link without phy

[Chris Packham]

On 2/10/20 1:36 am, Andrew Lunn wrote:
>>> Can you run 1000Base-X over these links?
>> With some reading "1000base-x" does seem the right thing to say here.
>> It's even what is reflected in the CMODE field for those ports.
> One more thing you might need is
>
> managed = "in-band-status";
>
>>> If you can, it is probably
>>> worth chatting to Russell King about using inband-signalling, and what
>>> is needed to make it work without having back to back SFPs. If i
>>> remember correctly, Russell has said not much is actually needed.
>> That'd be ideal. The sticking point seems to be allowing it to have no PHY.
> I think there is more to it than that. This is new ground to some
> extent.

managed = "in-band-status"; helps to convince things that there isn't a 
PHY. I need to update mv88e6xxx_mac_link_up to not force the link when 
mode == MLO_AN_INBAND.

I also have a problem with mv88e6xxx_serdes_pcs_get_state expecting 
mv88e6xxx_serdes_get_lane() to return a lane number. Implementing 
mv88e6xxx_serdes_get_lane() for the mv88e6097 causes a lot of other code 
paths to trigger which didn't before. I think I'm close to getting 
something sensible working for my hardware but I'm off on leave for a 
week so I just wanted to get this out before I go.