From: Ioana Ciornei <ioana.ciornei@nxp.com>
To: davem@davemloft.net, netdev@vger.kernel.org
Cc: shawnguo@kernel.org, robh+dt@kernel.org,
devicetree@vger.kernel.org, Ioana Ciornei <ioana.ciornei@nxp.com>
Subject: [RESEND net-next 2/9] arm64: dts: ls1088ardb: add QSGMII PHY nodes
Date: Fri, 2 Oct 2020 17:48:40 +0300 [thread overview]
Message-ID: <20201002144847.13793-3-ioana.ciornei@nxp.com> (raw)
In-Reply-To: <20201002144847.13793-1-ioana.ciornei@nxp.com>
Annotate the external MDIO1 node and describe the 8 QSGMII PHYs found on
the LS1088ARDB board and add phy-handles for DPMACs 3-10 to its
associated PHY. Also, add the internal PCS MDIO nodes for the internal
MDIO buses found on the LS1088A SoC along with their internal PCS PHY
and link the corresponding DPMAC to the PCS through the pcs-handle.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
---
.../boot/dts/freescale/fsl-ls1088a-rdb.dts | 100 ++++++++++++++++++
.../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 50 +++++++++
2 files changed, 150 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
index 5633e59febc3..d7886b084f7f 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts
@@ -17,6 +17,98 @@ / {
compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
};
+&dpmac3 {
+ phy-handle = <&mdio1_phy5>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ pcs-handle = <&pcs3_0>;
+};
+
+&dpmac4 {
+ phy-handle = <&mdio1_phy6>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ pcs-handle = <&pcs3_1>;
+};
+
+&dpmac5 {
+ phy-handle = <&mdio1_phy7>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ pcs-handle = <&pcs3_2>;
+};
+
+&dpmac6 {
+ phy-handle = <&mdio1_phy8>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ pcs-handle = <&pcs3_3>;
+};
+
+&dpmac7 {
+ phy-handle = <&mdio1_phy1>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ pcs-handle = <&pcs7_0>;
+};
+
+&dpmac8 {
+ phy-handle = <&mdio1_phy2>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ pcs-handle = <&pcs7_1>;
+};
+
+&dpmac9 {
+ phy-handle = <&mdio1_phy3>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ pcs-handle = <&pcs7_2>;
+};
+
+&dpmac10 {
+ phy-handle = <&mdio1_phy4>;
+ phy-connection-type = "qsgmii";
+ managed = "in-band-status";
+ pcs-handle = <&pcs7_3>;
+};
+
+&emdio1 {
+ status = "okay";
+
+ mdio1_phy1: emdio1_phy@1 {
+ reg = <0x1c>;
+ };
+
+ mdio1_phy2: emdio1_phy@2 {
+ reg = <0x1d>;
+ };
+
+ mdio1_phy3: emdio1_phy@3 {
+ reg = <0x1e>;
+ };
+
+ mdio1_phy4: emdio1_phy@4 {
+ reg = <0x1f>;
+ };
+
+ mdio1_phy5: emdio1_phy@5 {
+ reg = <0x0c>;
+ };
+
+ mdio1_phy6: emdio1_phy@6 {
+ reg = <0x0d>;
+ };
+
+ mdio1_phy7: emdio1_phy@7 {
+ reg = <0x0e>;
+ };
+
+ mdio1_phy8: emdio1_phy@8 {
+ reg = <0x0f>;
+ };
+};
+
&i2c0 {
status = "okay";
@@ -87,6 +179,14 @@ &esdhc {
status = "okay";
};
+&pcs_mdio3 {
+ status = "okay";
+};
+
+&pcs_mdio7 {
+ status = "okay";
+};
+
&qspi {
status = "okay";
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
index 22544e3b7737..ad8679e58f9a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
@@ -672,6 +672,56 @@ emdio2: mdio@0x8B97000 {
status = "disabled";
};
+ pcs_mdio3: mdio@8c0f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0f000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs3_0: pcs-phy@0 {
+ reg = <0>;
+ };
+
+ pcs3_1: pcs-phy@1 {
+ reg = <1>;
+ };
+
+ pcs3_2: pcs-phy@2 {
+ reg = <2>;
+ };
+
+ pcs3_3: pcs-phy@3 {
+ reg = <3>;
+ };
+ };
+
+ pcs_mdio7: mdio@8c1f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c1f000 0x0 0x1000>;
+ little-endian;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ pcs7_0: pcs-phy@0 {
+ reg = <0>;
+ };
+
+ pcs7_1: pcs-phy@1 {
+ reg = <1>;
+ };
+
+ pcs7_2: pcs-phy@2 {
+ reg = <2>;
+ };
+
+ pcs7_3: pcs-phy@3 {
+ reg = <3>;
+ };
+ };
+
cluster1_core0_watchdog: wdt@c000000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
--
2.28.0
next prev parent reply other threads:[~2020-10-02 14:49 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-02 14:48 [RESEND net-next 0/9] arm64: dts: layerscape: update MAC nodes with PHY information Ioana Ciornei
2020-10-02 14:48 ` [RESEND net-next 1/9] arm64: dts: ls1088a: add external MDIO device nodes Ioana Ciornei
2020-10-02 15:33 ` Florian Fainelli
2020-10-02 15:46 ` Ioana Ciornei
2020-10-02 14:48 ` Ioana Ciornei [this message]
2020-10-02 15:37 ` [RESEND net-next 2/9] arm64: dts: ls1088ardb: add QSGMII PHY nodes Florian Fainelli
2020-10-02 15:48 ` Ioana Ciornei
2020-10-02 14:48 ` [RESEND net-next 3/9] arm64: dts: ls1088ardb: add necessary DTS nodes for DPMAC2 Ioana Ciornei
2020-10-02 14:48 ` [RESEND net-next 4/9] arm64: dts: ls208xa: add the external MDIO nodes Ioana Ciornei
2020-10-02 14:48 ` [RESEND net-next 5/9] arm64: dts: ls2088ardb: add PHY nodes for the CS4340 PHYs Ioana Ciornei
2020-10-02 14:48 ` [RESEND net-next 6/9] arm64: dts: ls2088ardb: add PHY nodes for the AQR405 PHYs Ioana Ciornei
2020-10-02 14:48 ` [RESEND net-next 7/9] arm64: dts: ls208xa: add PCS MDIO and PCS PHY nodes Ioana Ciornei
2020-10-02 14:48 ` [RESEND net-next 8/9] arm64: dts: lx2160a: " Ioana Ciornei
2020-10-02 14:48 ` [RESEND net-next 9/9] arm64: dts: lx2160ardb: add nodes for the AQR107 PHYs Ioana Ciornei
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