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From: Leon Romanovsky <leon@kernel.org>
To: Bjorn Helgaas <helgaas@kernel.org>
Cc: Don Dutile <ddutile@redhat.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Saeed Mahameed <saeedm@nvidia.com>,
	Jason Gunthorpe <jgg@nvidia.com>,
	Jakub Kicinski <kuba@kernel.org>,
	linux-pci@vger.kernel.org, linux-rdma@vger.kernel.org,
	netdev@vger.kernel.org,
	Alex Williamson <alex.williamson@redhat.com>
Subject: Re: [PATCH mlx5-next 1/4] PCI: Configure number of MSI-X vectors for SR-IOV VFs
Date: Sun, 10 Jan 2021 10:25:12 +0200	[thread overview]
Message-ID: <20210110082512.GE31158@unreal> (raw)
In-Reply-To: <20210108210913.GA1471923@bjorn-Precision-5520>

On Fri, Jan 08, 2021 at 03:09:13PM -0600, Bjorn Helgaas wrote:
> On Thu, Jan 07, 2021 at 10:54:38PM -0500, Don Dutile wrote:
> > On 1/7/21 7:57 PM, Bjorn Helgaas wrote:
> > > On Sun, Jan 03, 2021 at 10:24:37AM +0200, Leon Romanovsky wrote:
>
> > > > + **/
> > > > +int pci_set_msix_vec_count(struct pci_dev *dev, int numb)
> > > > +{
> > > > +	struct pci_dev *pdev = pci_physfn(dev);
> > > > +
> > > > +	if (!dev->msix_cap || !pdev->msix_cap)
> > > > +		return -EINVAL;
> > > > +
> > > > +	if (dev->driver || !pdev->driver ||
> > > > +	    !pdev->driver->sriov_set_msix_vec_count)
> > > > +		return -EOPNOTSUPP;
> > > > +
> > > > +	if (numb < 0)
> > > > +		/*
> > > > +		 * We don't support negative numbers for now,
> > > > +		 * but maybe in the future it will make sense.
> > > > +		 */
> > > > +		return -EINVAL;
> > > > +
> > > > +	return pdev->driver->sriov_set_msix_vec_count(dev, numb);
> > >
> > > So we write to a VF sysfs file, get here and look up the PF, call a PF
> > > driver callback with the VF as an argument, the callback (at least for
> > > mlx5) looks up the PF from the VF, then does some mlx5-specific magic
> > > to the PF that influences the VF somehow?
> >
> > There's no PF lookup above.... it's just checking if a pdev has a
> > driver with the desired msix-cap setting(reduction) feature.
>
> We started with the VF (the sysfs file is attached to the VF).  "pdev"
> is the corresponding PF; that's what I meant by "looking up the PF".
> Then we call the PF driver sriov_set_msix_vec_count() method.
>
> I asked because this raises questions of whether we need mutual
> exclusion or some other coordination between setting this for multiple
> VFs.

MSI-X are managed by HW and they are separated between VFs.
IMHO, it will be better if SW won't do too much coordination.

Thanks

>
> Obviously it's great to answer all these in email, but at the end of
> the day, the rationale needs to be in the commit, either in code
> comments or the commit log.

  parent reply	other threads:[~2021-01-10  8:26 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-03  8:24 [PATCH mlx5-next 0/4] Dynamically assign MSI-X vectors count Leon Romanovsky
2021-01-03  8:24 ` [PATCH mlx5-next 1/4] PCI: Configure number of MSI-X vectors for SR-IOV VFs Leon Romanovsky
2021-01-08  0:57   ` Bjorn Helgaas
2021-01-08  3:54     ` Don Dutile
2021-01-08  7:25       ` Leon Romanovsky
2021-01-08 16:21         ` Alex Williamson
2021-01-10  8:47           ` Leon Romanovsky
2021-01-08 21:09       ` Bjorn Helgaas
2021-01-09  2:54         ` Don Dutile
2021-01-10  8:33           ` Leon Romanovsky
2021-01-10  8:25         ` Leon Romanovsky [this message]
2021-01-10  8:29       ` Leon Romanovsky
2021-01-10  8:22     ` Leon Romanovsky
2021-01-03  8:24 ` [PATCH mlx5-next 2/4] net/mlx5: Add dynamic MSI-X capabilities bits Leon Romanovsky
2021-01-03  8:24 ` [PATCH mlx5-next 3/4] net/mlx5: Dynamically assign MSI-X vectors count Leon Romanovsky
2021-01-03  8:24 ` [PATCH mlx5-next 4/4] net/mlx5: Allow to the users to configure number of MSI-X vectors Leon Romanovsky
2021-01-06  5:50 ` [PATCH mlx5-next 0/4] Dynamically assign MSI-X vectors count Leon Romanovsky

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