From: Michael Walle <michael@walle.cc>
To: netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Michael Walle <michael@walle.cc>
Subject: [PATCH net-next 6/9] net: phy: icplus: don't set APS_EN bit on IP101G
Date: Tue, 9 Feb 2021 17:40:48 +0100 [thread overview]
Message-ID: <20210209164051.18156-7-michael@walle.cc> (raw)
In-Reply-To: <20210209164051.18156-1-michael@walle.cc>
This bit is reserved as 'always-write-1'. While this is not a particular
error, because we are only setting it, guard it by checking the model to
prevent errors in the future.
Signed-off-by: Michael Walle <michael@walle.cc>
---
drivers/net/phy/icplus.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
index 189a9a34ed5f..a6e1c7611f15 100644
--- a/drivers/net/phy/icplus.c
+++ b/drivers/net/phy/icplus.c
@@ -250,7 +250,7 @@ static int ip101a_g_probe(struct phy_device *phydev)
static int ip101a_g_config_init(struct phy_device *phydev)
{
struct ip101a_g_phy_priv *priv = phydev->priv;
- int err, c;
+ int err;
/* configure the RXER/INTR_32 pin of the 32-pin IP101GR if needed: */
switch (priv->sel_intr32) {
@@ -280,11 +280,16 @@ static int ip101a_g_config_init(struct phy_device *phydev)
break;
}
- /* Enable Auto Power Saving mode */
- c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS);
- c |= IP101A_G_APS_ON;
+ /* Enable Auto Power Saving mode on IP101A, on IP101G this bit is
+ * reserved as 'write-one'.
+ */
+ if (priv->model == IP101A) {
+ err = phy_set_bits(phydev, IP10XX_SPEC_CTRL_STATUS, IP101A_G_APS_ON);
+ if (err)
+ return err;
+ }
- return phy_write(phydev, IP10XX_SPEC_CTRL_STATUS, c);
+ return 0;
}
static int ip101a_g_ack_interrupt(struct phy_device *phydev)
--
2.20.1
next prev parent reply other threads:[~2021-02-09 16:43 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-09 16:40 [PATCH net-next 0/9] net: phy: icplus: cleanups and new features Michael Walle
2021-02-09 16:40 ` [PATCH net-next 1/9] net: phy: icplus: use PHY_ID_MATCH_MODEL() macro Michael Walle
2021-02-10 1:55 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 2/9] net: phy: icplus: use PHY_ID_MATCH_EXACT() for IP101A/G Michael Walle
2021-02-10 1:57 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 3/9] net: phy: icplus: drop address operator for functions Michael Walle
2021-02-10 1:57 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 4/9] net: phy: icplus: use the .soft_reset() of the phy-core Michael Walle
2021-02-10 2:02 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 5/9] net: phy: icplus: add IP101A/IP101G model detection Michael Walle
2021-02-09 20:03 ` Heiner Kallweit
2021-02-09 16:40 ` Michael Walle [this message]
2021-02-10 2:04 ` [PATCH net-next 6/9] net: phy: icplus: don't set APS_EN bit on IP101G Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 7/9] net: phy: icplus: select page before writing control register Michael Walle
2021-02-10 2:07 ` Andrew Lunn
2021-02-10 7:03 ` Heiner Kallweit
2021-02-10 8:25 ` Michael Walle
2021-02-10 9:03 ` Heiner Kallweit
2021-02-10 9:14 ` Michael Walle
2021-02-10 10:30 ` Russell King - ARM Linux admin
2021-02-10 10:38 ` Michael Walle
2021-02-10 10:49 ` Russell King - ARM Linux admin
2021-02-10 11:14 ` Michael Walle
2021-02-10 11:48 ` Russell King - ARM Linux admin
2021-02-10 12:17 ` Michael Walle
2021-02-10 12:26 ` Heiner Kallweit
2021-02-10 20:27 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 8/9] net: phy: icplus: add PHY counter for IP101G Michael Walle
2021-02-10 2:10 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 9/9] net: phy: icplus: add MDI/MDIX support for IP101A/G Michael Walle
2021-02-10 2:12 ` Andrew Lunn
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