From: Michael Walle <michael@walle.cc>
To: netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
Michael Walle <michael@walle.cc>
Subject: [PATCH net-next 7/9] net: phy: icplus: select page before writing control register
Date: Tue, 9 Feb 2021 17:40:49 +0100 [thread overview]
Message-ID: <20210209164051.18156-8-michael@walle.cc> (raw)
In-Reply-To: <20210209164051.18156-1-michael@walle.cc>
Registers >= 16 are paged. Be sure to set the page. It seems this was
working for now, because the default is correct for the registers used
in the driver at the moment. But this will also assume, nobody will
change the page select register before linux is started. The page select
register is _not_ reset with a soft reset of the PHY.
Add read_page()/write_page() support for the IP101G and use it
accordingly.
Signed-off-by: Michael Walle <michael@walle.cc>
---
drivers/net/phy/icplus.c | 50 +++++++++++++++++++++++++++++++---------
1 file changed, 39 insertions(+), 11 deletions(-)
diff --git a/drivers/net/phy/icplus.c b/drivers/net/phy/icplus.c
index a6e1c7611f15..858b9326a72d 100644
--- a/drivers/net/phy/icplus.c
+++ b/drivers/net/phy/icplus.c
@@ -49,6 +49,8 @@ MODULE_LICENSE("GPL");
#define IP101G_DIGITAL_IO_SPEC_CTRL 0x1d
#define IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32 BIT(2)
+#define IP101G_DEFAULT_PAGE 16
+
#define IP175C_PHY_ID 0x02430d80
#define IP1001_PHY_ID 0x02430d90
#define IP101A_PHY_ID 0x02430c54
@@ -250,23 +252,25 @@ static int ip101a_g_probe(struct phy_device *phydev)
static int ip101a_g_config_init(struct phy_device *phydev)
{
struct ip101a_g_phy_priv *priv = phydev->priv;
- int err;
+ int oldpage, err;
+
+ oldpage = phy_select_page(phydev, IP101G_DEFAULT_PAGE);
/* configure the RXER/INTR_32 pin of the 32-pin IP101GR if needed: */
switch (priv->sel_intr32) {
case IP101GR_SEL_INTR32_RXER:
- err = phy_modify(phydev, IP101G_DIGITAL_IO_SPEC_CTRL,
- IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32, 0);
+ err = __phy_modify(phydev, IP101G_DIGITAL_IO_SPEC_CTRL,
+ IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32, 0);
if (err < 0)
- return err;
+ goto out;
break;
case IP101GR_SEL_INTR32_INTR:
- err = phy_modify(phydev, IP101G_DIGITAL_IO_SPEC_CTRL,
- IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32,
- IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32);
+ err = __phy_modify(phydev, IP101G_DIGITAL_IO_SPEC_CTRL,
+ IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32,
+ IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32);
if (err < 0)
- return err;
+ goto out;
break;
default:
@@ -284,12 +288,14 @@ static int ip101a_g_config_init(struct phy_device *phydev)
* reserved as 'write-one'.
*/
if (priv->model == IP101A) {
- err = phy_set_bits(phydev, IP10XX_SPEC_CTRL_STATUS, IP101A_G_APS_ON);
+ err = __phy_set_bits(phydev, IP10XX_SPEC_CTRL_STATUS,
+ IP101A_G_APS_ON);
if (err)
- return err;
+ goto out;
}
- return 0;
+out:
+ return phy_restore_page(phydev, oldpage, err);
}
static int ip101a_g_ack_interrupt(struct phy_device *phydev)
@@ -347,6 +353,26 @@ static irqreturn_t ip101a_g_handle_interrupt(struct phy_device *phydev)
return IRQ_HANDLED;
}
+static int ip101a_g_read_page(struct phy_device *phydev)
+{
+ struct ip101a_g_phy_priv *priv = phydev->priv;
+
+ if (priv->model == IP101A)
+ return 0;
+
+ return __phy_read(phydev, IP101G_PAGE_CONTROL);
+}
+
+static int ip101a_g_write_page(struct phy_device *phydev, int page)
+{
+ struct ip101a_g_phy_priv *priv = phydev->priv;
+
+ if (priv->model == IP101A)
+ return 0;
+
+ return __phy_write(phydev, IP101G_PAGE_CONTROL, page);
+}
+
static struct phy_driver icplus_driver[] = {
{
PHY_ID_MATCH_MODEL(IP175C_PHY_ID),
@@ -373,6 +399,8 @@ static struct phy_driver icplus_driver[] = {
.config_intr = ip101a_g_config_intr,
.handle_interrupt = ip101a_g_handle_interrupt,
.config_init = ip101a_g_config_init,
+ .read_page = ip101a_g_read_page,
+ .write_page = ip101a_g_write_page,
.soft_reset = genphy_soft_reset,
.suspend = genphy_suspend,
.resume = genphy_resume,
--
2.20.1
next prev parent reply other threads:[~2021-02-09 16:43 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-09 16:40 [PATCH net-next 0/9] net: phy: icplus: cleanups and new features Michael Walle
2021-02-09 16:40 ` [PATCH net-next 1/9] net: phy: icplus: use PHY_ID_MATCH_MODEL() macro Michael Walle
2021-02-10 1:55 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 2/9] net: phy: icplus: use PHY_ID_MATCH_EXACT() for IP101A/G Michael Walle
2021-02-10 1:57 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 3/9] net: phy: icplus: drop address operator for functions Michael Walle
2021-02-10 1:57 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 4/9] net: phy: icplus: use the .soft_reset() of the phy-core Michael Walle
2021-02-10 2:02 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 5/9] net: phy: icplus: add IP101A/IP101G model detection Michael Walle
2021-02-09 20:03 ` Heiner Kallweit
2021-02-09 16:40 ` [PATCH net-next 6/9] net: phy: icplus: don't set APS_EN bit on IP101G Michael Walle
2021-02-10 2:04 ` Andrew Lunn
2021-02-09 16:40 ` Michael Walle [this message]
2021-02-10 2:07 ` [PATCH net-next 7/9] net: phy: icplus: select page before writing control register Andrew Lunn
2021-02-10 7:03 ` Heiner Kallweit
2021-02-10 8:25 ` Michael Walle
2021-02-10 9:03 ` Heiner Kallweit
2021-02-10 9:14 ` Michael Walle
2021-02-10 10:30 ` Russell King - ARM Linux admin
2021-02-10 10:38 ` Michael Walle
2021-02-10 10:49 ` Russell King - ARM Linux admin
2021-02-10 11:14 ` Michael Walle
2021-02-10 11:48 ` Russell King - ARM Linux admin
2021-02-10 12:17 ` Michael Walle
2021-02-10 12:26 ` Heiner Kallweit
2021-02-10 20:27 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 8/9] net: phy: icplus: add PHY counter for IP101G Michael Walle
2021-02-10 2:10 ` Andrew Lunn
2021-02-09 16:40 ` [PATCH net-next 9/9] net: phy: icplus: add MDI/MDIX support for IP101A/G Michael Walle
2021-02-10 2:12 ` Andrew Lunn
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