From: "Marek Behún" <kabel@kernel.org>
To: netdev@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>,
"David S . Miller" <davem@davemloft.net>,
Florian Fainelli <f.fainelli@gmail.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <rmk+kernel@armlinux.org.uk>,
kuba@kernel.org
Cc: "Marek Behún" <kabel@kernel.org>
Subject: [PATCH net-next 7/7] net: phy: marvell10g: support other MACTYPEs
Date: Wed, 24 Mar 2021 17:50:23 +0100 [thread overview]
Message-ID: <20210324165023.32352-8-kabel@kernel.org> (raw)
In-Reply-To: <20210324165023.32352-1-kabel@kernel.org>
Currently the only "changing" MACTYPE we support is when the PHY changes
between
10gbase-r / 5gbase-r / 2500base-x / sgmii
Add support for
xaui / 5gbase-r / 2500base-x / sgmii
rxaui / 5gbase-r / 2500base-x / sgmii
Signed-off-by: Marek Behún <kabel@kernel.org>
---
drivers/net/phy/marvell10g.c | 70 +++++++++++++++++++++---------------
1 file changed, 41 insertions(+), 29 deletions(-)
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
index c764795a142a..a0fc74456d32 100644
--- a/drivers/net/phy/marvell10g.c
+++ b/drivers/net/phy/marvell10g.c
@@ -595,6 +595,10 @@ static int mv3310_aneg_done(struct phy_device *phydev)
static void mv3310_update_interface(struct phy_device *phydev)
{
struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
+ phy_interface_t interface10g;
+
+ if (!phydev->link)
+ return;
/* In all of the "* with Rate Matching" modes the PHY interface is fixed
* at 10Gb. The PHY adapts the rate to actual wire speed with help of
@@ -610,38 +614,46 @@ static void mv3310_update_interface(struct phy_device *phydev)
case MV_V2_PORT_CTRL_MACTYPE_RXAUI_RATE_MATCH:
phydev->interface = PHY_INTERFACE_MODE_RXAUI;
return;
- default:
+ case MV_V2_PORT_CTRL_MACTYPE_USXGMII:
+ phydev->interface = PHY_INTERFACE_MODE_USXGMII;
+ return;
+ case MV_V2_PORT_CTRL_MACTYPE_10GBASER:
+ case MV_V2_PORT_CTRL_MACTYPE_10GBASER_NO_SGMII_AN:
+ interface10g = PHY_INTERFACE_MODE_10GBASER;
break;
+ case MV_V2_PORT_CTRL_MACTYPE_XAUI:
+ interface10g = PHY_INTERFACE_MODE_XAUI;
+ break;
+ case MV_V2_PORT_CTRL_MACTYPE_RXAUI:
+ interface10g = PHY_INTERFACE_MODE_RXAUI;
+ break;
+ default:
+ unreachable();
}
- if ((phydev->interface == PHY_INTERFACE_MODE_SGMII ||
- phydev->interface == PHY_INTERFACE_MODE_2500BASEX ||
- phydev->interface == PHY_INTERFACE_MODE_10GBASER) &&
- phydev->link) {
- /* The PHY automatically switches its serdes interface (and
- * active PHYXS instance) between Cisco SGMII, 10GBase-R and
- * 2500BaseX modes according to the speed. Florian suggests
- * setting phydev->interface to communicate this to the MAC.
- * Only do this if we are already in one of the above modes.
- */
- switch (phydev->speed) {
- case SPEED_10000:
- phydev->interface = PHY_INTERFACE_MODE_10GBASER;
- break;
- case SPEED_5000:
- phydev->interface = PHY_INTERFACE_MODE_5GBASER;
- break;
- case SPEED_2500:
- phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
- break;
- case SPEED_1000:
- case SPEED_100:
- case SPEED_10:
- phydev->interface = PHY_INTERFACE_MODE_SGMII;
- break;
- default:
- break;
- }
+ /* The PHY automatically switches its serdes interface (and active PHYXS
+ * instance) between Cisco SGMII, 2500BaseX, 5GBase-R and 10GBase-R /
+ * xaui / rxaui modes according to the speed.
+ * Florian suggests setting phydev->interface to communicate this to the
+ * MAC. Only do this if we are already in one of the above modes.
+ */
+ switch (phydev->speed) {
+ case SPEED_10000:
+ phydev->interface = interface10g;
+ break;
+ case SPEED_5000:
+ phydev->interface = PHY_INTERFACE_MODE_5GBASER;
+ break;
+ case SPEED_2500:
+ phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
+ break;
+ case SPEED_1000:
+ case SPEED_100:
+ case SPEED_10:
+ phydev->interface = PHY_INTERFACE_MODE_SGMII;
+ break;
+ default:
+ break;
}
}
--
2.26.2
prev parent reply other threads:[~2021-03-24 16:51 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-24 16:50 [PATCH net-next 0/7] net: phy: marvell10g updates Marek Behún
2021-03-24 16:50 ` [PATCH net-next 1/7] net: phy: marvell10g: rename register Marek Behún
2021-03-24 16:50 ` [PATCH net-next 2/7] net: phy: marvell10g: fix typo Marek Behún
2021-03-24 16:50 ` [PATCH net-next 3/7] net: phy: marvell10g: allow 5gabse-r and usxgmii Marek Behún
2021-03-24 16:50 ` [PATCH net-next 4/7] net: phy: marvell10g: add MACTYPE definitions for 88X3310/88X3310P Marek Behún
2021-03-24 16:58 ` Russell King - ARM Linux admin
2021-03-24 18:09 ` Marek Behún
2021-03-24 18:11 ` Russell King - ARM Linux admin
2021-03-24 16:50 ` [PATCH net-next 5/7] net: phy: marvell10g: save MACTYPE instead of rate_matching boolean Marek Behún
2021-03-24 16:59 ` Russell King - ARM Linux admin
2021-03-24 18:12 ` Marek Behún
2021-03-24 16:50 ` [PATCH net-next 6/7] net: phy: marvell10g: support more rate matching modes Marek Behún
2021-03-24 16:50 ` Marek Behún [this message]
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