From: "Marek Behún" <kabel@kernel.org>
To: netdev@vger.kernel.org, Russell King <rmk+kernel@armlinux.org.uk>,
Andrew Lunn <andrew@lunn.ch>
Cc: "David S . Miller" <davem@davemloft.net>,
kuba@kernel.org, "Marek Behún" <kabel@kernel.org>
Subject: [PATCH net-next v4 08/16] net: phy: marvell10g: check for correct supported interface mode
Date: Wed, 7 Apr 2021 22:22:46 +0200 [thread overview]
Message-ID: <20210407202254.29417-9-kabel@kernel.org> (raw)
In-Reply-To: <20210407202254.29417-1-kabel@kernel.org>
The 88E2110 does not support xaui nor rxaui modes. Check for correct
interface mode for different chips.
Signed-off-by: Marek Behún <kabel@kernel.org>
---
drivers/net/phy/marvell10g.c | 37 +++++++++++++++++++++++++++++-------
1 file changed, 30 insertions(+), 7 deletions(-)
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
index b0b3fccac65f..a7c6b1944b05 100644
--- a/drivers/net/phy/marvell10g.c
+++ b/drivers/net/phy/marvell10g.c
@@ -109,11 +109,14 @@ enum {
};
struct mv3310_chip {
+ void (*init_supported_interfaces)(unsigned long *mask);
int (*get_mactype)(struct phy_device *phydev);
int (*init_interface)(struct phy_device *phydev, int mactype);
};
struct mv3310_priv {
+ DECLARE_BITMAP(supported_interfaces, PHY_INTERFACE_MODE_MAX);
+
u32 firmware_ver;
bool rate_match;
phy_interface_t const_interface;
@@ -391,6 +394,7 @@ static const struct sfp_upstream_ops mv3310_sfp_ops = {
static int mv3310_probe(struct phy_device *phydev)
{
+ const struct mv3310_chip *chip = to_mv3310_chip(phydev);
struct mv3310_priv *priv;
u32 mmd_mask = MDIO_DEVS_PMAPMD | MDIO_DEVS_AN;
int ret;
@@ -440,6 +444,8 @@ static int mv3310_probe(struct phy_device *phydev)
if (ret)
return ret;
+ chip->init_supported_interfaces(priv->supported_interfaces);
+
return phy_sfp_probe(phydev, &mv3310_sfp_ops);
}
@@ -540,17 +546,12 @@ static int mv3310_init_interface(struct phy_device *phydev, int mactype)
static int mv3310_config_init(struct phy_device *phydev)
{
+ struct mv3310_priv *priv = dev_get_drvdata(&phydev->mdio.dev);
const struct mv3310_chip *chip = to_mv3310_chip(phydev);
int err, mactype;
/* Check that the PHY interface type is compatible */
- if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
- phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&
- phydev->interface != PHY_INTERFACE_MODE_5GBASER &&
- phydev->interface != PHY_INTERFACE_MODE_XAUI &&
- phydev->interface != PHY_INTERFACE_MODE_RXAUI &&
- phydev->interface != PHY_INTERFACE_MODE_10GBASER &&
- phydev->interface != PHY_INTERFACE_MODE_USXGMII)
+ if (!test_bit(phydev->interface, priv->supported_interfaces))
return -ENODEV;
phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
@@ -857,12 +858,34 @@ static int mv3310_set_tunable(struct phy_device *phydev,
}
}
+static void mv3310_init_supported_interfaces(unsigned long *mask)
+{
+ __set_bit(PHY_INTERFACE_MODE_SGMII, mask);
+ __set_bit(PHY_INTERFACE_MODE_2500BASEX, mask);
+ __set_bit(PHY_INTERFACE_MODE_5GBASER, mask);
+ __set_bit(PHY_INTERFACE_MODE_XAUI, mask);
+ __set_bit(PHY_INTERFACE_MODE_RXAUI, mask);
+ __set_bit(PHY_INTERFACE_MODE_10GBASER, mask);
+ __set_bit(PHY_INTERFACE_MODE_USXGMII, mask);
+}
+
+static void mv2110_init_supported_interfaces(unsigned long *mask)
+{
+ __set_bit(PHY_INTERFACE_MODE_SGMII, mask);
+ __set_bit(PHY_INTERFACE_MODE_2500BASEX, mask);
+ __set_bit(PHY_INTERFACE_MODE_5GBASER, mask);
+ __set_bit(PHY_INTERFACE_MODE_10GBASER, mask);
+ __set_bit(PHY_INTERFACE_MODE_USXGMII, mask);
+}
+
static const struct mv3310_chip mv3310_type = {
+ .init_supported_interfaces = mv3310_init_supported_interfaces,
.get_mactype = mv3310_get_mactype,
.init_interface = mv3310_init_interface,
};
static const struct mv3310_chip mv2110_type = {
+ .init_supported_interfaces = mv2110_init_supported_interfaces,
.get_mactype = mv2110_get_mactype,
.init_interface = mv2110_init_interface,
};
--
2.26.2
next prev parent reply other threads:[~2021-04-07 20:24 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-07 20:22 [PATCH net-next v4 00/16] net: phy: marvell10g updates Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 01/16] net: phy: marvell10g: rename register Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 02/16] net: phy: marvell10g: fix typo Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 03/16] net: phy: marvell10g: allow 5gbase-r and usxgmii Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 04/16] net: phy: marvell10g: indicate 88X33x0 only port control registers Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 05/16] net: phy: marvell10g: add all MACTYPE definitions for 88X33x0 Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 06/16] net: phy: marvell10g: add MACTYPE definitions for 88E21xx Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 07/16] net: phy: marvell10g: support all rate matching modes Marek Behún
2021-04-07 23:03 ` Andrew Lunn
2021-04-07 20:22 ` Marek Behún [this message]
2021-04-07 23:05 ` [PATCH net-next v4 08/16] net: phy: marvell10g: check for correct supported interface mode Andrew Lunn
2021-04-07 20:22 ` [PATCH net-next v4 09/16] net: phy: marvell10g: store temperature read method in chip strucutre Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 10/16] net: phy: marvell10g: support other MACTYPEs Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 11/16] net: phy: marvell10g: add separate structure for 88X3340 Marek Behún
2021-04-07 23:09 ` Andrew Lunn
2021-07-10 16:12 ` Matteo Croce
2021-07-11 13:09 ` Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 12/16] net: phy: marvell10g: fix driver name for mv88e2110 Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 13/16] net: phy: add constants for 2.5G and 5G speed in PCS speed register Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 14/16] net: phy: marvell10g: differentiate 88E2110 vs 88E2111 Marek Behún
2021-04-07 23:10 ` Andrew Lunn
2021-04-07 20:22 ` [PATCH net-next v4 15/16] net: phy: marvell10g: change module description Marek Behún
2021-04-07 20:22 ` [PATCH net-next v4 16/16] MAINTAINERS: add myself as maintainer of marvell10g driver Marek Behún
2021-04-08 20:20 ` [PATCH net-next v4 00/16] net: phy: marvell10g updates patchwork-bot+netdevbpf
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