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[5.12.16.165]) by smtp.gmail.com with ESMTPSA id hi5sm2600734pjb.31.2021.04.20.07.04.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Apr 2021 07:04:45 -0700 (PDT) Date: Tue, 20 Apr 2021 17:04:33 +0300 From: Vladimir Oltean To: Michael Walle Cc: Jakub Kicinski , "David S. Miller" , netdev@vger.kernel.org, Po Liu , Claudiu Manoil , Alex Marginean , Rob Herring , Shawn Guo , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Russell King - ARM Linux admin , Andrew Lunn , Vladimir Oltean Subject: Re: [PATCH net-next 0/5] Flow control for NXP ENETC Message-ID: <20210420140433.hajuvfiz4humhhkt@skbuf> References: <20210416234225.3715819-1-olteanv@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Hi Michael, On Tue, Apr 20, 2021 at 03:27:24PM +0200, Michael Walle wrote: > Hi Vladimir, > > Am 2021-04-17 01:42, schrieb Vladimir Oltean: > > From: Vladimir Oltean > > > > This patch series contains logic for enabling the lossless mode on the > > RX rings of the ENETC, and the PAUSE thresholds on the internal FIFO > > memory. > > > > During testing it was found that, with the default FIFO configuration, > > a sender which isn't persuaded by our PAUSE frames and keeps sending > > will cause some MAC RX frame errors. To mitigate this, we need to ensure > > that the FIFO never runs completely full, so we need to fix up a setting > > that was supposed to be configured well out of reset. Unfortunately this > > requires the addition of a new mini-driver. > > What happens if the mini driver is not enabled? Then the fixes aren't > applied and bad things happen (now with the addition of flow control), > right? > > I'm asking because, if you have the arm64 defconfig its not enabled. > > shouldn't it be something like: > > diff --git a/drivers/net/ethernet/freescale/enetc/Kconfig > b/drivers/net/ethernet/freescale/enetc/Kconfig > index d88f60c2bb82..cdc0ff89388a 100644 > --- a/drivers/net/ethernet/freescale/enetc/Kconfig > +++ b/drivers/net/ethernet/freescale/enetc/Kconfig > @@ -2,7 +2,7 @@ > config FSL_ENETC > tristate "ENETC PF driver" > depends on PCI && PCI_MSI > - depends on FSL_ENETC_IERB || FSL_ENETC_IERB=n > + select FSL_ENETC_IERB > select FSL_ENETC_MDIO > select PHYLINK > select PCS_LYNX Yes, ideally the IERB driver and the ENETC PF driver should be built in the same way, or the IERB driver can be built-in and the PF driver can be module. I don't know how to express this using Kconfig, sorry.